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M263 Datasheet(PDF) 335 Page - Nuvoton Technology Corporation

Part # M263
Description  Arm짰 Cortex짰-M 32-bit Microcontroller
PDF  398 Pages
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Manufacturer  NUVOTON [Nuvoton Technology Corporation]
Direct Link  http://www.nuvoton.com
Logo NUVOTON - Nuvoton Technology Corporation

M263 Datasheet(HTML) 335 Page - Nuvoton Technology Corporation

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M261/M262/M263
Mar 25, 2020
Page 335 of 398
Rev 1.02
6.34
Enhanced 12-bit Analog-to-Digital Converter (EADC)
6.34.1
Overview
The chip contains one 12-bit successive approximation analog-to-digital converter (SAR ADC
converter) with 16 external input channels and 3 internal channels. The ADC converter can be started
by software trigger, EPWM0/1 triggers, BPWM0/1 triggers, timer0~3 overflow pulse triggers, ADINT0,
ADINT1 interrupt EOC (End of conversion) pulse trigger and external pin (EADC0_ST) input signal.
6.34.2
Features
Analog input voltage range: 0~ VREF (Max to 3.6V)
Reference voltage from VREF pin
12-bit resolution and 10-bit accuracy is guaranteed
Up to 16 single-end analog external input channels or 8 pair differential analog input
channels
Up to 3 internal channels, they are band-gap voltage (VBG), temperature sensor (VTEMP),
and Battery power (VBAT)
Four ADC interrupts (ADINT0~3) with individual interrupt vector addresses
Maximum ADC clock frequency is 48 MHz
Up to 3.43 MSPS conversion rate
Configurable ADC internal sampling time.
12-bit, 10-bit, 8-bit, 6-bit configurable resolution.
Supports calibration and load calibration words capability.
Supports internal reference voltage VREF: 1.6V, 2.0V, 2.5V, and 3.0V.
Supports three power saving modes:
–
Deep Power-down mode
–
Power-down mode
–
Standby mode
Up to 19 sample modules
–
Each of sample modules which is configurable for ADC converter channel
EADC_CH0~15 and trigger source
–
Sample module 16~18 is fixed for ADC channel 16, 17, 18 input sources as band-gap
voltage, temperature sensor, and battery power (VBAT)
–
Double buffer for sample control logic module 0~3
–
Configurable sampling time for each sample module
–
Conversion results are held in 19 data registers with valid and overrun indicators
An ADC conversion can be started by:
–
Write 1 to SWTRGn (EADC_SWTRG[n], n = 0~18)
–
External pin EADC0_ST
–
Timer0~3 overflow pulse triggers
–
ADINT0 and ADINT1 interrupt EOC (End of conversion) pulse triggers
–
EPWM/BPWM triggers



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