PFS154 datasheet(36/91 Pages) PADAUK

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PFS154

8bit MTP Type IO Controller

Page 36 of 91

PDK-DS-PFS154_CN_V105 –Jun. 9, 2020

The stack memory for interrupt is shared with data memory and its address is specified by stack register sp.

Since the program counter is 16 bits width, the bit 0 of stack register sp should be kept 0. Moreover, user can

use pushaf / popaf instructions to store or restore the values of ACC and flag register to / from stack memory.

Since the stack memory is shared with data memory, the stack position and level are arranged by the compiler

in Mini-C project. When defining the stack level in ASM project, users should arrange their locations carefully to

prevent address conflicts.

Once the interrupt occurs, its operation will be:

 The program counter will be stored automatically to the stack memory specified by register sp.

 New sp will be updated to sp+2.

 Global interrupt will be disabled automatically.

 The next instruction will be fetched from address 0x010.

During the interrupt service routine, the interrupt source can be determined by reading the intrq register.

Note: Even if INTEN=0, INTRQ will be still triggered by the interrupt source.

After finishing the interrupt service routine and issuing the reti instruction to return back, its operation will be:

 The program counter will be restored automatically from the stack memory specified by register sp.

 New sp will be updated to sp-2.

 Global interrupt will be enabled automatically.

 The next instruction will be the original one before interrupt.

User must reserve enough stack memory for interrupt, two bytes stack memory for one level interrupt and four

bytes for two levels interrupt. And so on, two bytes stack memory is for pushaf. For interrupt operation, the

following sample program shows how to handle the interrupt, noticing that it needs four bytes stack memory to

handle one level interrupt and pushaf.

void

FPPA0

(void)

{

...

INTEN

PA0;

// INTEN =1; interrupt request when PA0 level changed

INTRQ

// clear INTRQ

ENGINT

// global interrupt enable

...

DISGINT

// global interrupt disable

...

}

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