TLC32040C, TLC32040I, TLC32041C, TLC32041I

ANALOG INTERFACE CIRCUITS

SLAS014E – SEPTEMBER 1987 – REVISED MAY 1995

18

POST OFFICE BOX 655303

correction results

Table 4 below shows the optimum p values and the corresponding correction results for 8000-Hz and 9600-Hz

sampling rates.

Table 4. Correction Results

f (Hz)

ERROR (dB)

fs = 8000 Hz

ERROR (dB)

fs = 9600 Hz

f (Hz)

s

p1 = – 0.14813

p2 = 0.9888

s

p1 = – 0.1307

p2 = 0.9951

300

– 0.099

– 0.043

600

– 0.089

– 0.043

900

– 0.054

0

1200

– 0.002

0

1500

0.041

0

1800

0.079

0.043

2100

0.100

0.043

2400

0.091

0.043

2700

– 0.043

0

3000

– 0.102

– 0.043

TMS320 software requirements

The digital correction filter equation can be written in state variable form as follows:

Y = k1

× Y + k2 × U

where

k1 = p1

k2 = (1 – p1)

× p2

Y = filter state

U = next I/O sample

The coefficients k1 and k2 must be represented as 16-bit integers. The SACH instruction (with the proper shift)

will yield the correct result. With the assumption that the TMS320 processor page pointer and memory

configuration are properly initialized, the equation can be executed in seven instructions or seven cycles with

the following program:

ZAC

LT K2

MPY U

LTA K1

MPY Y

APAC

SACH (dma), (shift)