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IPS2200 Datasheet(PDF) 5 Page - Renesas Technology Corp |
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IPS2200 Datasheet(HTML) 5 Page - Renesas Technology Corp |
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5 / 35 page ![]() IPS2200 Datasheet Jan.19.21 Page 5 1. Pin Assignments The IPS2200 is available in a 16-TSSOP 4.4 5.0 mm RoHS package. It is qualified for an ambient temperature of -40°C to +125°C. 1 2 16 15 14 13 12 11 10 3 4 5 6 7 SIO_SDA SCK_SCL OUT4 OUT3 OUT2 OUT1 VDD CSN_IRQN RX1 RX2 RX3 RX4 TX1 TX2 9 8 GND VDDA Figure 1. Pin Assignments for 4.4mm 5.0mm 16-TSSOP Package – Top View 2. Pin Descriptions Table 1. Pin Descriptions Pin Number Name Type Description 1 CSN_IRQN Digital Input/Output Chip select input for the SPI interface; external pull-up resistor required. Push/pull interrupt output for I2C or SPI interface. Programmable options, see Table 3. 2 RX1 Analog Input Connect the receiver coil 1 (sine) between the RX2 and RX1 pins. 3 RX2 4 RX3 Analog Input Connect the receiver coil 2 (cosine) between the RX4 and RX3 pins. 5 RX4 6 TX1 Analog Input/Output Connect the transmitter coil between the TX1 and TX2 pins. The resonant frequency is adjusted with a parallel capacitor CT between TX1 and TX2 or with capacitors CT1 from TX2 to GND and CT2 from TX1 to GND. 7 TX2 8 VDDA Supply Internal analog voltage supply. Connect a capacitor CVA to the GND pin. 9 GND Supply Common ground connection. 10 VDD Supply External supply voltage. Connect two parallel capacitors CVD to the GND pin. 11 OUT1 Analog Output, Digital Output Buffered analog or digital output; see Table 2. 12 OUT2 Analog Output, Digital Output Buffered analog or digital output; see Table 2. 13 OUT3 Analog Output, Digital Output Buffered analog or digital output; see Table 2. 14 OUT4 Analog Output, Digital Output Buffered analog or digital output; see Table 2. 15 SCK_SCL Digital Input Clock input for digital programming and diagnostic interfaces: I2C interface: SCL clock input; external pull-up resistor mandatory, see Figure 18, Figure 19, and Figure 20. SPI interface: SCK clock input; external pull-up resistor is optional, see Figure 16 and Figure 17. |
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