AT90PWM2 datasheet(143/365 Pages) ATMEL

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143

AT90PWM2/3

4317A-3–AVR–02/05

Enhanced Resolution

Lamp Ballast applications need an enhanced resolution down to 50Hz. The method to

improve the normal resolution is based on Flank Width Modulation (also called Frac-

tional Divider). Cycles are grouped into frames of 16 cycles. Cycles are modulated by a

sequence given by the fractional divider number. The resulting output frequency is the

average of the frequencies in the frame. The fractional divider (d) is given by

OCRnRB[15:12].

The PSC output period is directly equal to the PSCOUTn0 On Time + Dead Time

(OT0+DT0) and PSCOUTn1 On Time + DeadTime (OT1+DT1) values. These values

are 12 bits numbers. The frequency adjustment can only be done in steps like the dedi-

cated counters. The step width is defined as the frequency difference between two

neighboring PSC frequencies:

with k is the number of CLK

PSC period in a PSC cycle and is given by the following

formula:

with f

OP is the output operating frequency.

Exemple, in normal mode, with maximum operating frequency 160 kHz and f

PLL = 64

Mhz, k equals 400. The resulting resolution is Delta F equals 64MHz / 400 / 401 = 400

Hz.

In enhanced mode, the output frequency is the average of the frame formed by the 16

consecutive cycles.

b1 and fb2 are two neightboring base frequencies.

∆ff1 f2

–

PLL

----------

PLL

------------

–

PSC

()

--------------------

PSC

----------

AVERAGE

–

---------------

------

AT90PWM2 Datasheet(PDF) 143 Page - ATMEL Corporation

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