| Electronic Components Datasheet Search |
|
AT90PWM2 Datasheet(PDF) 190 Page - ATMEL Corporation |
|
|
|||||||||||||||||||||||||||||
AT90PWM2 Datasheet(HTML) 190 Page - ATMEL Corporation |
|
190 / 365 page ![]() 190 AT90PWM2/3 4317B–AVR–02/05 SPI Status Register – SPSR • Bit 7 – SPIF: SPI Interrupt Flag When a serial transfer is complete, the SPIF flag is set. An interrupt is generated if SPIE in SPCR is set and global interrupts are enabled. If SS is an input and is driven low when the SPI is in Master mode, this will also set the SPIF flag. SPIF is cleared by hard- ware when executing the corresponding interrupt handling vector. Alternatively, the SPIF bit is cleared by first reading the SPI Status Register with SPIF set, then accessing the SPI Data Register (SPDR). • Bit 6 – WCOL: Write COLlision Flag The WCOL bit is set if the SPI Data Register (SPDR) is written during a data transfer. The WCOL bit (and the SPIF bit) are cleared by first reading the SPI Status Register with WCOL set, and then accessing the SPI Data Register. • Bit 5..1 – Res: Reserved Bits These bits are reserved bits in the AT90PWM2/3 and will always read as zero. • Bit 0 – SPI2X: Double SPI Speed Bit When this bit is written logic one the SPI speed (SCK Frequency) will be doubled when the SPI is in Master mode (see Table 73). This means that the minimum SCK period will be two CPU clock periods. When the SPI is configured as Slave, the SPI is only guaran- teed to work at f clkio/4 or lower. The SPI interface on the AT90PWM2/3 is also used for program memory and EEPROM downloading or uploading. See Serial Programming Algorithm305 for serial program- ming and verification. SPI Data Register – SPDR • Bits 7:0 - SPD7:0: SPI Data The SPI Data Register is a read/write register used for data transfer between the Regis- ter File and the SPI Shift Register. Writing to the register initiates data transmission. Reading the register causes the Shift Register Receive buffer to be read. Bit 765 432 10 SPIF WCOL – – – – – SPI2X SPSR Read/Write RR RRR RR R/W Initial Value 000 000 00 Bit 765 432 10 SPD7 SPD6 SPD5 SPD4 SPD3 SPD2 SPD1 SPD0 SPDR Read/Write R/W R/W R/W R/W R/W R/W R/W R/W Initial Value X X X X X X X X Undefined |
|
Link URL |
| Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Contact us | Privacy Policy | Link to Datasheet | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |