| Electronic Components Datasheet Search |
|
CD1020 Datasheet(PDF) 42 Page - NXP Semiconductors |
|
|
|||||||||||||||||||||||||||||
CD1020 Datasheet(HTML) 42 Page - NXP Semiconductors |
|
42 / 56 page ![]() NXP Semiconductors 42 CD1020 7.10.17 LPM voltage threshold SP configuration The CD1020 is able to use different voltage thresholds to wake-up from LPM. When configured as SG, a Logic [0] means the input will use the LPM delta voltage threshold to determine the state of the switch. A Logic [1] means the input uses the Normal threshold (VICTHR) to determine the state of the switch. When configured as an SB, it only uses the 4.0 V threshold regardless of the status of the LPM voltage threshold bit. The user must ensure that the correct current level is set to allow the crossing of the normal mode threshold (typically 4.0 V). 7.10.18 LPM voltage threshold SG configuration This means the input uses the LPM delta voltage threshold to determine the state of the switch. A Logic [1] means the input uses the Normal threshold to determine the state of the switch. The user must ensure that the correct current level is set to allow the crossing of the normal mode threshold (typically 4.0 V) Table 29. LPM voltage threshold configuration SP register Register address R/W SPI data bits [23 – 0] [31–25] [24] bit 23 bit 22 bit 21 bit 20 bit 19 bit 18 bit 17 bit 16 0010_100 0/1 Unused Default on POR 00 000 000 bit 15 bit 14 bit 13 bit 12 bit 11 bit 10 bit 9 bit 8 Unused 00 000 000 bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 SP7 SP6 SP5 SP4 SP3 SP2 SP1 SP0 00 000 000 MISO return word bit [23] bit [22] bits [21 – 0] 0010_100[R/W] FAULT STATUS INTflg Register Data Table 30. LPM voltage threshold configuration SG register Register address R/W SPI data bits [23 – 0] [31–25] [24] bit 23 bit 22 bit 21 bit 20 bit 19 bit 18 bit 17 bit 16 0010_101 0/1 Unused Default on POR 00 000 000 bit 15 bit 14 bit 13 bit 12 bit 11 bit 10 bit 9 bit 8 Unused SG13 SG12 SG11 SG10 SG9 SG8 00 000 000 bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 SG7 SG6 SG5 SG4 SG3 SG2 SG1 SG0 00 000 000 MISO return word bit [23] bit [22] bits [21 – 0] 0010_101[R/W] FAULT STATUS INTflg Register Data |
|
Link URL |
| Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Contact us | Privacy Policy | Link to Datasheet | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |