CD1020 datasheet(5/56 Pages) NXP

5 / 56 page

NXP Semiconductors

CD1020

Pin connections

3.1

Pinout

Figure 3. QFN (WF-Type) pinouts

3.2

Pin definitions

Table 2. CD1020 pin definitions

number

QFN

Pin name Pin function

Formal name

Definition

GND

Ground

Ground for logic, analog

MOSI

Input/SPI

SPI Slave In

SPI control data input pin from the MCU

SCLK

Input/SPI

Serial Clock

SPI control clock input pin

CS_B

Input/SPI

Chip Select

SPI control chip select input pin

1 – 4

21 – 24

SP0–3

SP4–7

Input

Programmable Switches 0–7

Switch to programmable input pins (SB or SG)

5 – 11

14 – 20

SG0–6,

SG7–13

Input

Switch-to-Ground Inputs 0 –13 Switch-to-ground input pins

VBATP

Power

Battery Input

Battery supply input pin. Pin requires external reverse battery protection

WAKE_B

Input/Output

Wake-up

Open drain wake-up output. Designed to control a power supply enable pin.

Input used to allow a wake-up from an external event.

INT_B

Input/Output

Interrupt

Open-drain output to MCU. Used to indicate an input switch change of state.

Used as an input to allow wake-up from LPM via an external INT_B falling

event.

AMUX

Output

Analog Multiplex Output

Analog multiplex output

VDDQ

Input

Voltage Drain Supply

3.3 V/5.0 V supply. Sets SPI communication level for the MISO driver and I/

O level buffer

Transparent Top View

101112

32 31

SP0

SP1

SP2

SP3

SG0

SG1

SG2

SG3

SP7

SP6

SP5

SP4

SG13

SG12

SG11

SG10

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