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CD1020 Datasheet(PDF) 44 Page - NXP Semiconductors

Part # CD1020
Description  22 channel multiple switch detection interface
PDF  56 Pages
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Manufacturer  NXP [NXP Semiconductors]
Direct Link  http://www.nxp.com
Logo NXP - NXP Semiconductors

CD1020 Datasheet(HTML) 44 Page - NXP Semiconductors

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CD1020
7.10.21 Enter low-power mode
Low-power mode (LPM) is used to reduce system quiescent currents. Low-power mode may be entered only by sending the low-power
command. When returning to normal mode, all register settings is maintained.
The Enter Low-power mode register is write only and has the effect of going to LPM and beginning operation as selected (polling, interrupt
timer). When returning form low-power mode, the first SPI transaction will return the Fault Status and the intflg bit set to high, as well as
the actual status of the Input pins.
7.10.22 AMUX control register
The analog voltage on switch inputs may be read by the MCU using the analog command (Table 34). Internal to the CD1020 is a 22-to-1
analog multiplexer. The voltage present on the selected input pin is buffered and made available on the AMUX output pin. The AMUX
output pin is clamped to a maximum of VDDQ volts regardless of the higher voltages present on the input pin. After an input has been
selected as the analog, the corresponding bit in the next MISO data stream is logic [0].
Setting the current to wetting current (configurable) may be useful for reading sensor inputs. The MCU may change or update the analog
select register via software at any time in normal mode. The analog select defaults to no input.
Table 33. Enter low-power mode command
Register address
W
SPI data bits [23 – 0]
[31–25]
[24]
bits [23 – 16]
0011_100
1
0000_0000
bits [15 – 8]
0000_0000
bits [7 – 0]
0000_0000
MISO return word
—
Table 34. Slow polling SG register
Register address
R/W
SPI data bits [23 – 0]
[31–25]
[24]
bit 23
bit 22
bit 21
bit 20
bit 19
bit 18
bit 17
bit 16
0011_101
0/1
Unused
Default on POR
0000
000
0
bit 15
bit 14
bit 13
bit 12
bit 11
bit 10
bit 9
bit 8
Unused
0000
000
0
bit 7
bit 6
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
Unused
asett0
asel[5–0]
0000
000
0
MISO return word
bit [23]
bit [22]
bits [21 – 0]
0011_101[R/W]
FAULT
STATUS
INTflg
Register Data
Table 35. AMUX current select
asett[0]
Zsource
0
hi Z (default)
1IWET



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