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Z8932320FSC Datasheet(PDF) 29 Page - Zilog, Inc. |
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Z8932320FSC Datasheet(HTML) 29 Page - Zilog, Inc. |
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29 / 60 page ![]() Z89223/273/323/373 ZiLOG 16-Bit Digital Signal Processors with A/D Converter DS000202-DSP0599 29 BANK/EXT REGISTER ASSIGNMENTS There are 16 different Banks of EXT registers. Control of the bank switching is done via the EXT7 register. The same EXT7 register exists in all Banks. Banks 0–5 support different combinations of external reg- isters for external peripherals, and external registers for in- ternal (on-chip) peripherals. Use the bank that offers the op- timum combination of internal and external registers to support the application. Use it as a preferred working bank to minimize bank switching. Banks 6–12 only decode EXT6 and EXT7. Do not use EXT0–5 for Banks 6–12. Banks 13–15 are control register banks. These banks are used in the initialization routines and whenever a configu- ration change is required. Refer to the sections on I/O Ports and Peripherals for details. Table 13. EXT Register Assignments Banks 0–4 Bank0 Bank1 Bank2 Bank3 Bank4 EXT0 User User User User User EXT1 User User User User User EXT2 User User User User User EXT3 SPI Data User User SPI Data User EXT4 Port0 Data Port0 Data User User User EXT5 Port2–Port1 Data Port2–Port1 Data Port3 Data User User EXT6 A/D_Ch0 Data A/D_Ch1 Data A/D_Ch2 Data A/D_Ch3 Data User EXT7 Interrupt status/ Bank Select Interrupt status/ Bank Select Interrupt status/ Bank Select Interrupt status/ Bank Select Interrupt status/ Bank Select Table 14. EXT Register Assignments Banks 5–15 Bank5 Bank6–12 Bank13 Bank14 Bank15 EXT0 A/D_Ch1 Data not defined A/D Control C/T2 Load/Read Port0 Control EXT1 A/D_Ch2 Data not defined C/T0 Control C/T1 Control Port1 Ctrl/Port0 Alloc EXT2 A/D_Ch3 Data not defined C/T0 Load C/T1 Load Ports 2, 3, & C/T2 Control EXT3 SPI Data not defined C/T0 Counter C/T1 Counter Wait State Control EXT4 Port0 Data not defined C/T0 Prescaler Ld C/T1 Prescaler Ld SPI Control EXT5 Port2–Port1 Data not defined C/T0 Prescaler C/T1 Prescaler System Clock Control EXT6 A/D_Ch0 Data A/D_Ch0 Data A/D_Ch0 Data Interrupt Polarity Interrupt Allocation EXT7 Interrupt status/ Bank Select Interrupt status/ Bank Select Interrupt status/ Bank Select Interrupt status/ Bank Select Interrupt status/ Bank Select |
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