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Z8932320FSC Datasheet(PDF) 33 Page - Zilog, Inc. |
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Z8932320FSC Datasheet(HTML) 33 Page - Zilog, Inc. |
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33 / 60 page ![]() Z89223/273/323/373 ZiLOG 16-Bit Digital Signal Processors with A/D Converter DS000202-DSP0599 33 I/O PORTS I/O pin allocation of ports for the different package types is designed to provide configuration flexibility. Each port line of Ports 0, 1, and 2 can be independently selected as an input or an output. Each port’s output lines can be glo- bally selected as push-pull or as open-drain outputs Table 15. I/O Port Bit Allocations Device Pins 44-Pin PLCC, 44-Pin PQFP 64-Pin TQFP, 68-Pin PLCC 80-Pin PQFP P0 MSB ED15–ED8, or P0.15–P0.8, or P1.7–P1.0 ED15–ED8, or P0.15–P0.8 ED15–ED8, or P0.15–P0.8 P0 LSB ED7–ED0, or P0.7–P0.0 ED7–ED0, or P0.7–P0.0 ED7–ED0, or P0.7–P0.0 P1 P1.7–P1.0 P1.7–P1.0 P2 P2.4–P2.0 P2.7–P2.0 P2.7–P2.0 P3 P3.7–P3.0 Figure 24. Port 0, 1 and 2 Configuration OEN Open-Drain Data Out Data In PAD Auto Latch R ≈ 500 kΩ |
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