AD4116

Data Sheet

Rev. 0 | Page 6 of 59

Parameter

Test Conditions/Comments

Min

Typ

Max

Unit

Crystal

Frequency

14

16

16.384

MHz

Start-Up Time

10

µs

External Clock (CLKIO)

4

4.096

MHz

Duty Cycle

30

50

70

%

LOGIC INPUTS

2 V ≤ IOVDD < 2.3 V

0.65 × IOVDD

V

2.3 V ≤ IOVDD ≤ 5.5 V

0.7 × IOVDD

V

2 V ≤ IOVDD < 2.3 V

0.35 × IOVDD

V

2.3 V ≤ IOVDD ≤ 5.5 V

0.7

V

Hysteresis

IOVDD ≥ 2.7 V

0.08

0.25

V

IOVDD < 2.7 V

0.04

0.2

V

Leakage Current

−10

+10

µA

LOGIC OUTPUT (DOUT/RDY)

0.8 × IOVDD

V

0.8 × IOVDD

V

0.8 × IOVDD

V

0.4

V

0.4

V

0.4

V

Floating state

−10

+10

µA

Output Capacitance

Floating state

10

pF

POWER REQUIREMENTS

Power Supply Voltage

AVDD to AVSS

4.5

5.5

V

AVSS to DGND

−2.75

0

V

IOVDD to DGND

2

5.5

V

IOVDD to AVSS

For AVSS < DGND

6.35

V

All outputs unloaded, digital inputs

connected to IOVDD or DGND

Full Operating Mode

AVDD Current

Including internal reference

5.3

6.63

mA

IOVDD Current

Internal clock

0.85

1.12

mA

Standby Mode

45

µA

Power-Down Mode

20

µA

POWER DISSIPATION

Full Operating Mode

31

mW

Standby Mode

223

µW

Power-Down Mode

100

µW

1

absolute (pin) voltage must not be exceeded for proper function.

2

Following a system zero-scale calibration, the offset error is in the order of the noise for the programmed output data rate selected. An internal zero-scale calibration

at low level inputs reduces the offset error in the order of the noise for the programmed output data rate selected.

3

To improve performance, use an external reference with better accuracy and lower temperature coefficient.

4

Specification is not production tested but is supported by characterization data at the initial product release.

5

Following a system full-scale calibration, the gain error is reduced to the order of the noise for the programmed output data rate.

6

This specification includes moisture sensitivity level (MSL) preconditioning effects.

7

This specification is with no load on the REFOUT pin and the digital output pins.