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LT8642-1

Rev. 0

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APPLICATIONS INFORMATION

Enable Pin

The LT8642-1 is in shutdown when the EN pin is low and

active when the pin is high. The rising threshold of the EN

comparator is 0.99V, with 40mV of hysteresis. The EN pin

can be tied to VIN if the shutdown feature is not used, or

tied to a logic level if shutdown control is required.

Adding a resistor divider from VIN to EN programs the

LT8642-1 to regulate the output only when VIN is above

a desired voltage (see the Block Diagram). Typically, this

threshold, VIN(EN), is used in situations where the input

supply is current limited, or has a relatively high source

resistance. A switching regulator draws constant power

from the source, so source current increases as source

voltage drops. This looks like a negative resistance load

to the source and can cause the source to current limit or

latch low under low source voltage conditions. The VIN(EN)

threshold prevents the regulator from operating at source

voltages where the problems might occur. This threshold

can be adjusted by setting the values R3 and R4 such that

they satisfy Equation 10.

VIN(EN) =

+ 1

⎛

⎝

⎜

⎞

⎠

⎟ • 0.99V

(10)

where the LT8642-1 will remain off until VIN is above

VIN(EN). Due to the comparator’s hysteresis, switching

will not stop until the input falls slightly below VIN(EN).

When operating in Burst Mode operation for light load

currents, the current through the VIN(EN) resistor network

can easily be greater than the supply current consumed

by the LT8642-1. Therefore, the VIN(EN) resistors should

be large to minimize their effect on efficiency at low loads.

INTVCC Regulator

An internal low dropout (LDO) regulator produces the

3.4V supply from VIN that powers the drivers and the

internal bias circuitry. The INTVCC can supply enough cur-

rent for the LT8642-1’s circuitry and must be bypassed

to ground with a minimum of 1μF ceramic capacitor. To

improve efficiency the internal LDO can also draw current

from the BIAS pin when the BIAS pin is at 3.1V or higher.

Typically the BIAS pin can be tied to the output of the

LT8642-1, or can be tied to an external supply of 3.3V or

above. If BIAS is connected to a supply other than VOUT,

be sure to bypass with a local ceramic capacitor. If the

BIAS pin is below 3.0V, the internal LDO will consume

current from VIN. Applications with high input voltage and

high switching frequency where the internal LDO pulls

current from VIN will increase die temperature because

of the higher power dissipation across the LDO. Do not

connect an external load to the INTVCC pin.

Frequency Compensation

Loop compensation determines the stability and transient

performance, and is provided by the components tied

to the VC pin. Generally, a capacitor (CC) and a resistor

(RC) in series to ground are used. Designing the com-

pensation network is a bit complicated and the best val-

ues depend on the application. A practical approach is

to start with one of the circuits in this data sheet that is

similar to your application and tune the compensation

network to optimize the performance. Simulation can help

in this process. Stability should then be checked across all

operating conditions, including load current, input voltage

and temperature. The LT1375 data sheet contains a more

thorough discussion of loop compensation and describes

how to test the stability using a transient load.

Figure 5 shows an equivalent circuit for the LT8642-1

control loop. The error amplifier is a transconductance

amplifier with finite output impedance. The power section,

consisting of the modulator, power switches, and inductor,

is modeled as a transconductance amplifier generating an

output current proportional to the voltage at the VC pin.

Note that the output capacitor integrates this current, and

that the capacitor on the VC pin (CC) integrates the error

amplifier output current, resulting in two poles in the loop.

A zero is required and comes from a resistor RC in series

with CC. This simple model works well as long as the value

of the inductor is not too high and the loop crossover

frequency is much lower than the switching frequency. A

phase lead capacitor (CPL) across the feedback divider can

be used to improve the transient response and is required

to cancel the parasitic pole caused by the feedback node

to ground capacitance.

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