LT4239 datasheet(9/24 Pages) AD

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LT4239

Rev. 0

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OPERATION

The LT4239 is designed to turn a board’s supply voltage

on and off in a controlled manner, allowing the board

to be safely inserted or removed from a live backplane.

Input protection devices such as Transient Voltage

Suppressors (TVS) are not required with this architecture.

The avalanching of the MOSFET will limit the voltage spike

on the input while the RC filter connected to the VCC pin

protects it from this transitory voltage.

LT4239 features a “Low Stress Staged Start” technique

using two gate drives to sequence the turn-on of the

external MOSFETs. At initial power-up, if UV is pulled

above its turn-on threshold, a 25ms debounce cycle is

initiated to ensure the input supply is firmly connected.

After debounce, GATE1 is charged up with a 10µA current

source. MOSFET M1 turns on and charges the output

capacitor with a current level that is set by the slew rate at

GATE1 and the output capacitance. Since the inrush cur-

rent level is usually much smaller than the maximum load

current, a small MOSFET can be chosen for M1. The cur-

rent flowing through M1 is constantly monitored through

the voltage drop on the sense resistor RS1. This voltage is

regulated to 50mV lasting for 100µs before the part turns

off and FLT pulls low during an overcurrent condition.

When the output voltage rises to within 1V of the input’s

and ∆VGATE1 is greater than 10V, M2 turns on with a strong

gate pull-up current of 50µA. A lower SOA rated and lower

RDS(ON) MOSFET can be used to keep the MOSFET’s cost

down. For high current applications, multiple MOSFETs

can be connected in parallel reducing the voltage drop

and power dissipation. When the output voltage reaches

within 100mV of the input supply and ∆VGATE2 is more

than 10V, GATE1 turns off.

Upon the completion of the 10ms power good timer, PG

goes high impedance indicating to the system that M2

is fully enhanced and ready to supply the load. The total

duration from the completion of the debounce time to

the start of the power good timer is set by a capacitor

connected from the STMR pin to ground. If due to any

reasons, such as output soft short, bad MOSFET connec-

tion or design mistake, PG timer does not start before

the start-up timer expires, LT4239 latches off and pulls

FLT low. Pull the UV pin below the 0.6V reset threshold

to restart the part.

At any time if the current flowing through M2 creates

more than 10mV of voltage drop across sense resistor

RS2, a circuit breaker timer will start with the duration set

by a capacitor at the CBTMR pin. At the expiration of the

CB timer, M2 turns off and FLT pulls low. If the current

flowing through M2 is large, such as during an output

short-circuit, the voltage drop across RS2 is regulated to

15mV for 100µs. Connecting the FLT pin to the UV pin will

allow an automatic retry after a long cool-down period.

LT4239 monitors the MOSFETs condition constantly even

after PG goes high impedance. If during the operation the

voltage drop from input to output is more than 100mV

or ∆VGATE2 drops below 10V, a FET-Bad timer of 20ms

starts. After the timer expires, GATE2 latches off and FLT

pulls low. Restart the part by lowering the VCC pin below

the 3.6V undervoltage lockout threshold momentarily as

UV cannot reset such fault.

A boost mode allowing extra current to flow through the

pass transistors without triggering fault timers is included

in the LT4239. Pull IBOOST pin above 1.6V to double both

the circuit breaker and current limit thresholds. The FET-

Bad fault threshold is also doubled to allow temporarily

load surge.

A current sense amplifier (CM) that is active during nor-

mal operating condition provides accurate monitoring of

current through the current sense resistor RS2. The sense

voltage is amplified by 100 times and level shifted to a

ground-referred output at the IMON pin. This analog out-

put voltage can be digitized by an external ADC.

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