AD5413 datasheet(37/49 Pages) AD

37 / 49 page

Data Sheet

AD5413

Rev. 0 | Page 37 of 49

2. PERFORM CALIBRATION

MEMORY REFRESH

1. PERFORM HARDWARE OR

SOFTWARE RESET

WRITE

5. WRITE 0V/0mA DAC

CODE

IS CAL_MEM_

UNREFRESHED

= 0?

IS CAL_MEM_

UNREFRESHED

= 0?

IS WAIT

= 500µs?

WAIT = 0

WAIT = WAIT + 1

IS WAIT

= 300µs?

WAIT = 0

WAIT = WAIT + 1

ADDRESS[D23:D21]

DATA[D15:D0]

ADDRESS[D23:D21]

DATA[D15:D0]

SLIPBIT +AD[1:0]

0x08

0xFCBA

3. CLEAR RESET_

OCCURED BIT

WRITE

SLIPBIT +AD[1:0]

0x14

D13 = 1

ADDRESS[D23:D21]

DATA[D15:D0]

ADDRESS[D23:D21]

DATA[D15:D0]

4. CONFIGURE THE DAC

(OUTPUT DISABLED)

WRITE

SLIPBIT +AD[1:0]

0x06

D6 = 0

(OUTPUT DISABLED)

WRITE

0x01

DAC CODE

6. PERFORM LDAC COMMAND

ADDRESS[D23:D21]

DATA[D15:D0]

SLIPBIT +AD[1:0]

WRITE

0x07

0x1DAC

7. CONFIGURE THE DAC

(OUTPUT ENABLED)

ADDRESS[D23:D21]

DATA[D15:D0]

SLIPBIT +AD[1:0]

WRITE

0x06

D6 = 1

(OUTPUT ENABLED)

8. WRITE THE REQUIRED DAC

CODE

ADDRESS[D23:D21]

DATA[D15:D0]

SLIPBIT +AD[1:0]

WRITE

0x01

DAC CODE

NOTES

1. A ? MEANS CONDITIONAL STATEMENT.

Figure 70. Example Configuration to Correctly Enable the Output (CRC Disabled for Simplicity)

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