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Data Sheet

AD5413

Rev. 0 | Page 43 of 49

General-Purpose Configuration 2 Register

Address: 0x0A, Reset: 0x0A0200, Name: GP_CONFIG2

The GP_CONFIG2 register configures and enables functions such as the voltage comparators and the global software LDAC command.

Table 32. Bit Descriptions for GP_CONFIG2

Bits

Bit Name

Description

Reset

Access

FAULT_PIN_STATUS

This bit reflects the current status of the FAULT pin.

0x0

[20:16]

REGISTER_ADDRESS

0x0

RESERVED

Reserved.

0x0

[14:13]

COMPARATOR_CONFIG

These pins enable or disable the voltage comparator inputs for test purposes. The

temperature comparator is permanently enabled (see the Background Supply and

Temperature Monitoring section).

0x0

R/W

00: disables voltage comparators (default).

01: reserved.

10: reserved.

11: enables voltage comparators. Set the INT_EN bit in the DAC_CONFIG register to

power up the REFIN buffer and make the REFIN buffer available to the REFIN comparator.

RESERVED

Reserved.

0x0

R/W

RESERVED

Reserved.

0x0

R/W

GLOBAL_SW_LDAC

When enabled, the AD5413 address bits are ignored when performing a software

LDAC command, which allows multiple devices to be simultaneously updated using

one SW_LDAC command.

0x0

R/W

0: disable (default).

1: enable.

FAULT_TIMEOUT

Reduced Fault Detect Timeout Enable. This bit configures the delay from when the

analog block indicates that a VIOUT fault has been detected to the associated change

of the relevant bit in the ANALOG_DIAG_RESULTS register. This feature provides

flexibility to accommodate different output load values.

0x1

R/W

0: fault detect timeout 25 ms.

1: fault detect timeout 6.5 ms (default).

[8:0]

RESERVED

Reserved.

0x0

R/W

Digital Diagnostic Configuration Register

Address: 0x10, Reset: 0x10005D, Name: DIGITAL_DIAG_CONFIG

The DIGITAL_DIAG_CONFIG register configures various digital diagnostic features of interest for a particular application.

Table 33. Bit Descriptions for DIGITAL_DIAG_CONFIG

Bits

Bit Name

Description

Reset

Access

FAULT_PIN_STATUS

This bit reflects the current status of the FAULT pin.

0x0

[20:16]

REGISTER_ADDRESS

0x0

[15:7]

RESERVED

Reserved.

0x0

DAC_LATCH_MON_EN

Diagnostic Monitor on DAC Latches Enable. This feature monitors the actual digital

code driving the DAC and compares the code with the digital code generated

within the digital block. Any difference between the two codes causes the

DAC_LATCH_MON_ERR flag bit to be set in the DIGITAL_DIAG_RESULTS register.

0x1

R/W

0: disable.

1: enable (default).

RESERVED

Reserved.

0x0

R/W

INVERSE_DAC_CHECK_EN

Check for DAC Code vs. Inverse DAC Code Error Enable.

0x1

R/W

0: disable.

1: enable (default).

CAL_MEM_CRC_EN

CRC of Calibration Memory on Calibration Memory Refresh Enable.

0x1

R/W

0: disable.

1: enable (default).

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