Electronic Components Datasheet Search
  English  ▼

X  

Preview PDF HTML

AD5413 Datasheet(PDF) 44 Page - Analog Devices

Part # AD5413
Description  Single-Channel, 14-Bit Voltage and Current Output DAC with HART Connectivity
PDF  49 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
Manufacturer  AD [Analog Devices]
Direct Link  http://www.analog.com
Logo AD - Analog Devices

AD5413 Datasheet(HTML) 44 Page - Analog Devices

Back Button AD5413 Datasheet HTML 40Page - Analog Devices AD5413 Datasheet HTML 41Page - Analog Devices AD5413 Datasheet HTML 42Page - Analog Devices AD5413 Datasheet HTML 43Page - Analog Devices AD5413 Datasheet HTML 44Page - Analog Devices AD5413 Datasheet HTML 45Page - Analog Devices AD5413 Datasheet HTML 46Page - Analog Devices AD5413 Datasheet HTML 47Page - Analog Devices AD5413 Datasheet HTML 48Page - Analog Devices Next Button
Zoom Inzoom in Zoom Outzoom out
 44 / 49 page
background image
AD5413
Data Sheet
Rev. 0 | Page 44 of 49
Bits
Bit Name
Description
Reset
Access
2
FREQ_MON_EN
Internal Frequency Monitor on MCLK Enable.
0x1
R/W
0: disable.
1: enable (default).
1
RESERVED
Reserved.
0x0
R/W
0
SPI_CRC_EN
SPI CRC Function Enable.
0x1
R/W
0: disable.
1: enable (default).
FAULT Pin Configuration Register
Address: 0x12, Reset: 0x120000, Name: FAULT_PIN_CONFIG
The FAULT_PIN_CONFIG register is used to mask particular fault bits from the FAULT pin, if so desired.
Table 34. Bit Descriptions for FAULT_PIN_CONFIG
Bits
Bit Name
Description
Reset
Access
21
FAULT_PIN_STATUS
This bit reflects the current status of the FAULT pin.
0x0
R
[20:16]
REGISTER_ADDRESS
Register Address.
0x0
R
15
INVALID_SPI_ACCESS_ERR
If this bit is set, do not map the invalid SPI access fault flag to the FAULT pin.
0x0
R/W
14
RESERVED
Reserved.
0x0
R/W
13
RESERVED
Reserved.
0x0
R/W
12
INVERSE_DAC_CHECK_ERR
If this bit is set, do not map the inverse DAC check error flag to the FAULT pin.
0x0
R/W
11
RESERVED
Reserved.
0x0
R/W
10
OSCILLATOR_STOP_DETECT
If this bit is set, do not map the oscillator stop detect fault to the FAULT pin.
0x0
R/W
9
DAC_LATCH_MON_ERR
If this bit is set, do not map the DAC latch monitor error flag to the FAULT pin.
0x0
R/W
8
RESERVED
Reserved.
0x0
R/W
7
SLIPBIT_ERR
If this bit is set, do not map the slip bit error flag to the FAULT pin.
0x0
R/W
6
SPI_CRC_ERR
If this bit is set, do not map the SPI CRC error flag to the FAULT pin.
0x0
R/W
[5:4]
RESERVED
Reserved.
0x0
R/W
3
IOUT_OC_ERR
If this bit is set, do not map the current output open-circuit error flag to the FAULT pin.
0x0
R/W
2
VOUT_SC_ERR
If this bit is set, do not map the voltage output short-circuit error flag to the FAULT pin.
0x0
R/W
1
RESERVED
Reserved.
0x0
R/W
0
DIE_TEMP_ERR
If this bit is set, do not map the die temperature error flag to the FAULT pin.
0x0
R/W
Two-Stage Readback Select Register
Address: 0x13, Reset: 0x130000, Name: TWO_STAGE_READBACK_SELECT
The TWO_STAGE_READBACK_SELECT register selects the address of the register required for a two-stage readback operation. The
address of the register selected for readback is stored in Bits[4:0].
Table 35. Bit Descriptions for TWO_STAGE_READBACK_SELECT
Bits
Bit Name
Description
Reset
Access
21
FAULT_PIN_STATUS
This bit reflects the current status of the FAULT pin.
0x0
R
[20:16]
REGISTER_ADDRESS
Register Address.
0x0
R
[15:7]
RESERVED
Reserved.
0x0
R
[6:5]
READBACK_MODE
SPI Readback Mode Control Bits.
0x0
R/W
0: two-stage SPI readback mode (default).
01: autostatus readback mode. The status register contents are shifted out on SDO for
each SPI frame.
10: shared SYNC autostatus readback mode. This mode allows the use of a shared SYNC
line on multiple devices (distinguished using the hardware address pins). After each valid
write to a device, a flag is set. This mode behaves similarly to the normal autostatus readback
mode, except the device does not output the status register contents on SDO as SYNC goes
low, unless the internal flag is set (that is, the previous SPI write is valid).



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49


Datasheet Download

Go To PDF Page


Link URL



Does ALLDATASHEET help your business so far?  [ DONATE ] 

About Alldatasheet   |   Advertisement   |   Contact us   |   Privacy Policy   |   Link to Datasheet    |   Link Exchange   |   Manufacturer List
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com