LTM4660 datasheet(16/28 Pages) AD

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LTM4660

Rev. 0

For more information www.analog.com

TEMPERATURE OF THERMISTOR (°C)

25°C

CURIE POINT

4660 F07

Figure 7. Characteristic of a Thermistor

TEMP TRIP LEVEL = 1.22V

TEMP

C–

TRACK/SS

FAULT

100ms

4660 F08

Figure 8. Temperature Trip Characteristic

Power Good

When VFB pin voltage falls below 7.5% or rises above

8.5% of the internal 0.8V reference or the reference set by

EXT_REF, the PGOOD pin is pulled low. The PGOOD pin is

also pulled low when the RUN pin is below 1.1V or when

the LTM4660 is in the soft-start or tracking phase. The

PGOOD pin will flag power good immediately when the

VFB pin is within the reference window. However, there is

an internal 50µs power bad mask when VFB goes out this

window. The PGOOD pin can be pulled up by an external

resistor to sources of up to 20V.

FAULT

During initial power up of the LTM4660 or when enabling

the part via the RUN pin, the FAULT pin will not be pulled

low even when CFLY and/or CMID need to be rebalanced to

VIN/2. But during normal operation, when rebalancing is

needed, the FAULT will be pulled low. Another condition

that causes the FAULT to go low is thermal shutdown,

either caused by the internal temperature reaching 150°C

or the voltage at TEMP pin reaching 1.22V. The FAULT

pin is allowed to be pulled up by an external resistor to

sources of up to 20V.

Frequency Compensation

The LTM4660 μModule employs peak current mode con-

trol for pulse width modulation of the power switches.

This method of control simplifies the compensation

design by eliminating the dynamics of the power inductor

contributing to the closed loop response. A Type-II net-

work is sufficient to compensate the LTM4660 feedback

loop. Such a network comprises of a resistor in series

with capacitor connected at COMPa pin—the output of

a transconductance error amplifier inside LTM4660, to

SGND. A high frequency roll-off capacitor of 22pF, as part

of the Type-II network is already connected at the COMPa

pin internal to LTM4660.

Choose the components of the Type-II network dependent

on the desired output response for line and load variations

as well as loop stability parameters phase margin and gain

margin of the feedback loop. In general, selecting a low

capacitance and a high resistance for the Type-II network

at COMPa pin leads to fast transient response but may

adversely affect the loop stability parameters.

A resistor capacitor network of 10k in series with 10nF is

connected from COMPb pin to SGND internal to LTM4660.

For most LTM4660 applications, it is sufficient to tie

COMPa and COMPb pins together to ensure closed loop

stability across line and load variations. Refer to LTM4660

model in LTspice® to fine tune and optimize the Type-II

network for each application circuit with LTM4660.

Input Capacitor Selection

The LTM4660 module should be connected to a low

AC-impedance DC source. For the regulator input, two

10μF input ceramic capacitors are required for RMS ripple

current. A 33μF or 47μF surface mount aluminum elec-

trolytic bulk capacitor can be used for more input bulk

capacitance. This bulk input capacitance is only needed

if the input source impedance is compromised by long

inductive leads. If low impedance power planes are used,

then this bulk capacitor is not needed. For IBC applica-

tions with 48V or 54V bus, choose input capacitors rated

to at least 100V.

APPLICATIONS INFORMATION

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