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LMK04828SNKDREP Datasheet(PDF) 3 Page - Texas Instruments

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Part # LMK04828SNKDREP
Description  LMK04828-EP Ultra-Low-Noise, JESD204B-Compliant Clock Jitter Cleaner
PDF  102 Pages
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Manufacturer  TI [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI - Texas Instruments

LMK04828SNKDREP Datasheet(HTML) 3 Page - Texas Instruments

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SDCLKout1
NC
NC
NC
Vcc1_VCO
LDObyp1
LDObyp2
Vcc9_CP2
Vcc7_OSCout
CPout2
Vcc10_PLL2
OSCin
OSCin*
Vcc8_OSCin
CLKin0
CLKin0*
SDCLKout3*
SDCLKout3
DCLKout2
DCLKout2*
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
SDCLKout1*
SYNC/SYSREF_REQ
Vcc6_PLL1
CLKin1/Fin/FBCLKin
CLKin1*/Fin*/FBCLKin*
DCLKout0
DCLKout0*
OSCout*/CLKin2*
OSCout/CLKin2
Status_LD2
RESET/GPO
LLP-64
Top down view
DAP
Vcc5_DIG
Clock Group 1
Clock Group 0
Clock Group 2
Clock Group 3
3
LMK04828-EP
www.ti.com
SNAS703 – APRIL 2017
Product Folder Links: LMK04828-EP
Submit Documentation Feedback
Copyright © 2017, Texas Instruments Incorporated
(1)
OSCout may also be third clock input, CLKin2.
5 Device Comparison Table
Table 1. Device Configuration Information
PART NUMBER
REFERENC
E
INPUTS(1)
OSCout (BUFFERED OSCin
Clock) LVDS/ LVPECL/
LVCMOS (1)
PLL2 PROGRAMMABLE
LVDS/LVPECL/HSDS
OUTPUTS
VCO0 FREQUENCY
VCO1 FREQUENCY
LMK04828-EP
Up to 3
Up to 1
14
2450 to 2755 MHz
2875 to 3080 MHz
(1)
See Pin Connection Recommendations for recommended connections.
6 Pin Configuration and Functions
NKD Package
64-Pin WQFN
Top View
Pin Functions
PIN
I/O
TYPE
DESCRIPTION
(1)
NO.
NAME
1
2
DCLKout0,
DCLKout0*
O
Programmable
Device clock output 0
3
4
SDCLKout1,
SDCLKout1*
O
Programmable
SYSREF or device clock output 1
5
RESET/GPO
I
CMOS
Device reset input or GPO



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