LMK04828SNKDREP datasheet(46/102 Pages) TI

Part #	LMK04828SNKDREP

Description	LMK04828-EP Ultra-Low-Noise, JESD204B-Compliant Clock Jitter Cleaner

PDF	102 Pages

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Manufacturer	TI [Texas Instruments]

Direct Link	http://www.ti.com

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LMK04828-EP

SNAS703 – APRIL 2017

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Product Folder Links: LMK04828-EP

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9.7.2.5 DCLKoutX_HS, SDCLKoutY_MUX, SDCLKoutY_DDLY, SDCLKoutY_HS

These registers set the half step for the device clock, the SYSREF output MUX, the SYSREF clock digital delay,

and half step.

Table 21. Registers 0x104, 0x10C, 0x114, 0x11C, 0x124, 0x12C, 0x134

BIT

NAME

POR

DEFAULT

DESCRIPTION

Reserved

DCLKoutX_HS

Sets the device clock half step value. Half step must be zero (0) for a divide of 1.

0: 0 cycles

1: -0.5 cycles

SDCLKoutY_MUX

Sets the input the the SDCLKoutY outputs.

0: Device clock output

1: SYSREF output

4:1

SDCLKoutY_DDLY

Sets the number of VCO cycles to delay the SDCLKoutY by when SYSREF output is

selected by SDCLKoutY_MUX.

Field Value

Delay Cycles

0 (0x00)

Bypass

1 (0x01)

2 (0x02)

...

10 (0x0A)

11 to 15 (0x0B to 0x0F)

Reserved

SDCLKoutY_HS

Sets the SYSREF clock half step value.

0: 0 cycles

1: -0.5 cycles

LMK04828SNKDREP Datasheet(PDF) 46 Page - Texas Instruments

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