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CS47L85 Datasheet(PDF) 57 Page - Cirrus Logic

Part # CS47L85
Description  Low-Power Smart Codec with Seven DSP Cores, Voice and Media Enhancement, and Integrated Sensor Hub
PDF  370 Pages
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Manufacturer  CIRRUS [Cirrus Logic]
Direct Link  http://www.cirrus.com
Logo CIRRUS - Cirrus Logic

CS47L85 Datasheet(HTML) 57 Page - Cirrus Logic

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CS47L85
Rev 4.3
57
REGISTER
ADDRESS
BIT
LABEL
DEFAULT
DESCRIPTION
trol
7:1
IN2R_PGA_VOL
[6:0]
40h
Input Path 2 (Right) PGA Volume
(Applicable to analogue inputs only)
00h to 3Fh = Reserved
40h = 0dB
41h = 1dB
42h = 2dB
… (1dB steps)
5F = 31dB
60h to 7Fh = Reserved
R797
(0319h)
ADC_Digit
al_Volume
_2R
14:13
IN2R_SRC [1:0]
00
Input Path 2 (Right) Source
00 = Differential (IN2ARP - IN2ARN)
01 = Single-ended (IN2ARP)
10 = Reserved
11 = Single-ended (IN2BR)
R798
(031Eh)
DMIC2R_
Control
5:0
IN2R_DMIC_DLY
[5:0]
00h
Input Path 2 (Right) Digital Delay
(Applicable to digital input only)
LSB = 1 sample, Range is 0 to 63.
(Sample rate is controlled by IN2_OSR.)
R800
(0320h)
IN3L_Cont
rol
15
IN3L_HPF
0
Input Path 3 (Left) HPF Enable
0 = Disabled
1 = Enabled
12:11
IN3_DMIC_SUP
[1:0]
00
Input Path 3 DMIC Reference Select
(Sets the DMICDAT3 and DMICCLK3
logic levels)
00 = MICVDD
01 = MICBIAS1
10 = MICBIAS2
11 = MICBIAS3
10
IN3_MODE
00
Input Path 3 Mode
0 = Analogue input
1 = Digital input
7:1
IN3L_PGA_VOL
[6:0]
40h
Input Path 3 (Left) PGA Volume
(Applicable to analogue inputs only)
00h to 3Fh = Reserved
40h = 0dB
41h = 1dB
42h = 2dB
… (1dB steps)
5F = 31dB
60h to 7Fh = Reserved
R801
(0321h)
ADC_Digit
al_Volume
_3L
14:13
IN3L_SRC [1:0]
00
Input Path 3 (Left) Source
00 = Differential (IN3LP - IN3LN)
01 = Single-ended (IN3LP)
10 = Reserved
11 = Reserved



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