CS47L85 datasheet(70/370 Pages) CIRRUS

70 / 370 page

CS47L85

Rev 4.3

DIGITAL CORE MIXERS

The CS47L85 provides an extensive digital mixing capability. The digital core mixing and signal processing blocks are

illustrated in Figure 22.

A 4-input digital mixer is associated with many of these functions, as illustrated. The digital mixer circuit is identical in each

instance, providing up to 4 selectable input sources, with independent volume control on each input.

The control registers associated with the digital core signal paths are shown in Figure 23 through to Figure 39. The full list

of digital mixer control registers (Register R1600 through to R3192) is provided in a separate document -

see “Register Map”

for further information.

Further description of the associated control registers is provided below. Generic register definitions are provided in Table

The digital mixer input sources are selected using the associated *_SRCn registers; the volume control is implemented via

the associated *_VOLn registers.

The ASRC, ISRC, and DSP Aux Input functions support selectable input sources, but do not incorporate any digital mixing.

The respective input source (*_SRCn) registers are identical to those of the digital mixers.

The *_SRCn registers select the input source(s) for the respective mixer or signal processing block. Note that the selected

input source(s) must be configured for the same sample rate as the block(s) to which they are connected. Sample rate

conversion functions are available to support flexible interconnectivity -

see “Asynchronous Sample Rate Converter (ASRC)”

and “Isochronous Sample Rate Converter (ISRC)”.

The *_SRCn registers for all digital core functions should be held at 00h if SYSCLK is not enabled

– SYSCLK must be

present and enabled before selecting other values for

these registers. See “Clocking and Sample Rates” for further details

(including requirements for reconfiguring SYSCLK while digital core mixers are enabled).

A status bit associated with each of the configurable input sources provides readback for the respective signal path. If an

Underclocked Error condition occurs, then these bits provide readback of which signal path(s) have been successfully

enabled.

The generic register definition for the digital mixers is provided in Table 8.

CS47L85 Datasheet(PDF) 70 Page - Cirrus Logic