CS47L85 datasheet(61/370 Pages) CIRRUS

61 / 370 page

CS47L85

Rev 4.3

INPUT SIGNAL PATH DIGITAL VOLUME CONTROL

A digital volume control is provided on each of the input signal paths, providing -64dB to +31.5dB gain control in 0.5dB steps.

An independent mute control is also provided for each input signal path.

Whenever the gain or mute setting is changed, the signal path gain is ramped up or down to the new settings at a

programmable rate. For increasing gain (or un-mute), the rate is controlled by the IN_VI_RAMP register. For decreasing

gain (or mute), the rate is controlled by the IN_VD_RAMP register. Note that the IN_VI_RAMP and IN_VD_RAMP registers

should not be changed while a volume ramp is in progress.

The IN_VU bits control the loading of the input signal path digital volume and mute controls. When IN_VU is set to 0, the

digital volume and mute settings will be loaded into the respective control register, but will not actually change the signal

path gain. The digital volume and mute settings on all of the input signal paths are updated when a 1 is written to IN_VU.

This makes it possible to update the gain of multiple signal paths simultaneously.

Note that, although the digital volume control registers provide 0.5dB steps, the internal circuits provide signal gain

adjustment in 0.125dB steps. This allows a very high degree of gain control, and smooth volume ramping under all operating

conditions.

The 0dBFS level of the IN1-IN6 digital input paths is not equal to the 0dBFS level of the CS47L85 digital core. The maximum

digital input signal level is -

6dBFS (see “Electrical Characteristics”). Under 0dBFS gain conditions, a -6dBFS input signal

corresponds to a 0dBFS input to the CS47L85 digital core functions.

The digital volume control register fields are described in Table 4 and Table 5.

ADDRESS

BIT

LABEL

DEFAULT

DESCRIPTION

R777

(0309h)

Input_Volu

me_Ramp

6:4

IN_VD_RAMP

[2:0]

010

Input Volume Decreasing Ramp Rate

(seconds/6dB)

000 = 0ms

001 = 0.5ms

010 = 1ms

011 = 2ms

100 = 4ms

101 = 8ms

110 = 15ms

111 = 30ms

This register should not be changed while

a volume ramp is in progress.

2:0

IN_VI_RAMP

[2:0]

010

Input Volume Increasing Ramp Rate

(seconds/6dB)

000 = 0ms

001 = 0.5ms

010 = 1ms

011 = 2ms

100 = 4ms

101 = 8ms

110 = 15ms

111 = 30ms

This register should not be changed while

a volume ramp is in progress.

R785

(0311h)

ADC_Digit

al_Volume

_1L

IN_VU

Input Signal Paths Volume and Mute

Update

Writing a 1 to this bit will cause the Input

Signal Paths Volume and Mute settings to

be updated simultaneously

IN1L_MUTE

Input Path 1 (Left) Digital Mute

0 = Un-mute

1 = Mute

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