LTC4271 datasheet(16/30 Pages) AD

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Figure 8. IEEE 802.3af Signature Resistance Ranges

Figure 9. PD Detection

FIRST

DETECTION

POINT

SECOND

DETECTION

POINT

VALID PD

25k SLOPE

275

165

0V-2V

OFFSET

VOLTAGE

91013 F09

LTC9101-3/LTC9103

Rev. 0

For more information www.analog.com

APPLICATIONS INFORMATION

Table 1. Default Device Configuration Options

CFG [2:0]

LTC9103

DEVICE COUNT

TOTAL NUMBER

OF PORTS

SYSTEM POWER

BUDGET

SET POWER

WARNING

POWER WARNING

RESET

000

64W

49W

45W

010

128W

113W

109W

Initially, two test currents are forced onto the port (via the

OUTn pin) and the resulting voltages are measured. The

detection circuitry subtracts the two V-I points to deter-

mine the resistive slope while removing offset caused by

series diodes or leakage at the port (see Figure 9). If the

forced-current detection yields a valid signature resis-

tance, two test voltages are then forced onto the port

and the resulting currents are measured and subtracted.

Both methods must report valid resistances for the port to

acknowledge a valid detection. PD signature resistances

between 17k and 29k (typically) are detected as valid.

See Table 2.

RESISTANCE

PSE

10k

15k

91013 F08

19k

26.5k

26.25k

23.75k

150 (NIC)

20k

30k

33k

DEVICE CONFIGURATION

An LTC9101-3 can control either one or two LTC9103s.

Each LTC9103 controls 8 ports. Thus, each LTC9101-3

can control up to 16 power ports. Note that CFG0 and

CFG2 must always be tied low. See Table 1.

DETECTION

Detection Overview

To avoid damaging network devices that were not designed

to tolerate DC voltage, a PSE must determine whether the

connected device is a valid PD before applying power. The

IEEE specification requires that a valid PD have a com-

mon-mode resistance of 25k ±5% at any port voltage below

10V. The PSE must accept resistances that fall between

19k and 26.5k, and it must reject resistances above 33k

or below 15k (shaded regions in Figure 8). The PSE may

choose to accept or reject resistances in the undefined

areas between the must-accept and must-reject ranges. In

particular, the PSE must reject standard computer network

ports, many of which have 150Ω common-mode termina-

tion resistors that will be damaged if power is applied to

them (the black region at the left of Figure 8).

Table 2. Detection Status

MEASURED PD SIGNATURE

DETECTION RESULT

Incomplete or Not Yet Tested

Detect Status Unknown

< 2.4k

Short Circuit

Capacitance > 2.7µF

CPD too High

2.4k < RPD < 17k

RSIG too Low

17k < RPD < 29k

Detect Good

< 29k < RPD < 50k

RSIG too High

> 50k

Open Circuit

Voltage > 10V

Port Voltage Outside Detect Range

4-Point Detection

The LTC9101-3/LTC9103 uses a 4-point detection method

to discover PDs. False-positive detections are minimized

by checking for signature resistance with both forced-cur-

rent and forced-voltage measurements.

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