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LTC4271 Datasheet(PDF) 24 Page - Analog Devices |
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LTC4271 Datasheet(HTML) 24 Page - Analog Devices |
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24 / 30 page ![]() 91013 F17 AGND VEE SENSEn VSSKn GATEn OUTn OUTn TO PORT S1B C1 1µF 100V LTC9103 D1 SMAJ58A + CBULK TVSBULK VEE Cn 0.1µF X7R 100V Qn RSENSEn AGND Figure 17. LTC9103 Surge Protection Figure 16. Power Supply Configuration with External 3.3V Regulators LTC9101-3/LTC9103 24 Rev. 0 For more information www.analog.com APPLICATIONS INFORMATION Sense Resistors The LTC9101-3/LTC9103 is designed for a low 0.1Ω current sense resistance per port, laid out as shown in the Layout Requirements section, Figure 18. In order to meet the IHOLD, ICUT, and ILIM accuracy required by the IEEE specification, the sense resistors should have ±1% tolerance or better, and no more than ±200ppm/°C tem- perature coefficient. Port Output Cap Each port requires a 0.1µF cap across OUTn to AGND (see Figure 17) to keep the LTC9103 stable while in cur- rent limit during startup or overload. Common ceramic capacitors often have significant voltage coefficients; this means the capacitance is reduced as the applied voltage increases. To minimize this problem, X7R ceramic capac- itors rated for at least 100V are recommended and must be located close to the LTC9103. 91013 F16 1µF C1 1µF 100V C2 1µF 100V R1 10k 1/2W R2 10k 1/2W 1µF 1µF 100V 1µF 100V 1µF 47µF 100V + 1µF VEE VEE 3.3V VEE VEE AGND CAP3 EXT3 PWRIN CAP4 LTC9103 VEE 3.3V AGND CAP3 EXT3 PWRIN CAP4 LTC9103 3.3V REGULATOR Surge Protection Ethernet ports can be subject to significant cable surge events. To keep PoE voltages below a safe level and pro- tect the application against damage, protection compo- nents, as shown in Figure 17, are required at the main supply, at the LTC9103 supply pins, and at each port. Bulk transient voltage suppression (TVSBULK) and bulk capacitance (CBULK) are required across the main PoE supply and should be sized to accommodate system level surge requirements. Across each LTC9103 AGND pin and VEE pin is a SMAJ58A 58V TVS (D1) and a 1µF, 100V bypass capaci- tor (C1). These components must be placed close to the LTC9103 pins. Each port requires an S1B clamp diode from OUTn to supply AGND. This diode steers harmful surges into the supply rails where they are absorbed by the surge sup- pressors and the VEE bypass capacitance. The layout of these paths must be low impedance. |
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