MPC8540 datasheet(385/1302 Pages) FREESCALE

385 / 1302 page

Functional Description

MPC8540 PowerQUICC III Integrated Host Processor Reference Manual, Rev. 1

Freescale Semiconductor

9-31

9.5.1.1

Supported DDR SDRAM Organizations

Although the DDR memory controller multiplexes row and column address bits onto 14 memory

address signals and 2 logical bank select signals, individual physical banks may be implemented

with memory devices requiring fewer than 28 address bits. Each physical bank may be

individually configured to provide from 12 to 14 row address bits, plus 2 logical bank-select bits

and from 8–11 column address bits. Table 9-26 describes DDR SDRAM device configurations

supported by the DDR memory controller.

NOTE

DDR SDRAM is limited to 27 total address bits.

If a transaction request is issued to the DDR memory controller and the address does not lie within

any of the programmed address ranges for an enabled chip select, a memory select error is flagged.

Errors are described in detail in Section 9.5.12, “Error Management.”

By using a memory-polling algorithm at power-on reset or by querying the JEDEC serial presence

detect capability of memory modules, system firmware uses the memory-boundary registers to

configure the DDR memory controller to map the size of each bank in memory. The memory

controller uses its bank map to assert the appropriate MCSn signal for memory accesses according

to the provided bank starting and ending addresses. The memory banks are not required to be

mapped to a contiguous address space.

9.5.2

DDR SDRAM Address Multiplexing

Table 9-27 shows the address bit encodings for each DDR SDRAM configuration. The address

presented at the memory controller signals MA[14:0] use MA[14] as the msb and MA[0] as the

lsb. Also, MA[10] is used as the auto precharge bit for reads and writes, so the column address can

never use MA[10].

Table 9-26. Supported DDR SDRAM Device Configurations

SDRAM Device

Device Configuration

Row

× Column Bits 64-Bit Bank Size

Four Banks of Memory

64 Mbits

8 Mbits

× 812 × 9

64 Mbytes

256 Mbytes

64 Mbits

4 Mbits

× 16

× 8

32 Mbytes

128 Mbytes

128 Mbits

16 Mbits

× 8

× 10

128 Mbytes

512 Mbytes

128 Mbits

8 Mbits

× 16

× 9

64 Mbytes

256 Mbytes

256 Mbits

32 Mbits

× 8

× 10

256 Mbytes

1 Gbytes

256 Mbits

16 Mbits

× 16

× 9

128 Mbytes

512 Mbytes

512 Mbits

64 Mbits

× 813 × 11

512 Mbytes

2 Gbytes

512 Mbits

32 Mbits

× 16

× 10

256 Mbytes

1 Gbytes

1 Gbits

128 Mbits

× 814 × 11

1 Gbytes

4 Gbytes

1 Gbits

64 Mbits

× 16

× 10

512 Mbytes

2 Gbytes

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