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MPC8540 Datasheet(PDF) 414 Page - Freescale Semiconductor, Inc |
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MPC8540 Datasheet(HTML) 414 Page - Freescale Semiconductor, Inc |
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414 / 1302 page ![]() MPC8540 PowerQUICC III Integrated Host Processor Reference Manual, Rev. 1 10-10 Freescale Semiconductor Programmable Interrupt Controller The PIC address offset map, shown in Table 10-7, is divided into three areas: •0xnn4_0000–0xnn4_FFF0—Global registers •0xnn5_0000–0xnn5_FFF0—Interrupt source configuration registers •0xnn6_0000–0xnn7_FFF0—Per-CPU registers Table 10-7. PIC Register Address Map Offset Register Access Reset Section/Page PIC Register Address Map—Global Registers 0x4_0000– 0x4_0030 Reserved — — — 0x4_0040 IPIDR0—Interprocessor interrupt 0 (IPI 0) dispatch register 1 W 0x0000_0000 10.3.7.1/10-39 0x4_0050 IPIDR1—IPI 1 dispatch register 0x4_0060 IPIDR2—IPI 2 dispatch register 0x4_0070 IPIDR3—IPI 3 dispatch register 0x4_0080 CTPR—Current task priority register R/W 0x0000_000F 10.3.7.2/10-40 0x4_0090 WHOAMI—Who am I register R 0x0000_0000 10.3.7.3/10-41 0x4_00A0 IACK—Interrupt acknowledge register R 0x0000_0000 10.3.7.4/10-41 0x4_00B0 EOI—End of interrupt register W 0x0000_0000 10.3.7.5/10-42 0x4_00C0– 0x4_0FF0 Reserved — — — 0x4_1000 FRR—Feature reporting register R 0x0037_0002 10.3.1.1/10-16 0x4_1010 Reserved — — — 0x4_1020 GCR—Global configuration register R/W 0x0000_0000 10.3.1.2/10-17 0x4_1030 Reserved — — — 0x4_1040– 0x4_1070 Vendor reserved — — — 0x4_1080 VIR—Vendor identification register R 0x0000_0000 10.3.1.3/10-17 0x4_1090 PIR—Processor initialization register R/W 0x0000_0000 10.3.1.4/10-18 0x4_10A0 IPIVPR0—IPI 0 vector/priority register R/W 0x8000_0000 10.3.1.5/10-19 0x4_10B0 IPIVPR1—IPI 1 vector/priority register 0x4_10C0 IPIVPR2—IPI 2 vector/priority register 0x4_10D0 IPIVPR3—IPI 3 vector/priority register 0x4_10E0 SVR—Spurious vector register R/W 0x0000_FFFF 10.3.1.6/10-19 0x4_10F0 TFRR—Timer frequency reporting register R/W 0x0000_0000 10.3.2.1/10-20 0x4_1100 GTCCR0—Global timer 0 current count register R 0x0000_0000 10.3.2.2/10-21 0x4_1110 GTBCR0—Global timer 0 base count register R/W 0x8000_0000 10.3.2.3/10-21 |
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