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MPC8540 Datasheet(PDF) 424 Page - Freescale Semiconductor, Inc |
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MPC8540 Datasheet(HTML) 424 Page - Freescale Semiconductor, Inc |
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424 / 1302 page ![]() MPC8540 PowerQUICC III Integrated Host Processor Reference Manual, Rev. 1 10-20 Freescale Semiconductor Programmable Interrupt Controller Figure 10-8. Spurious Vector Register (SVR) Table 10-13 describes the SVR fields. 10.3.2 Global Timer Registers This section describes the global timer registers. Note that each of the four timers have four individual configuration registers (GTCCRn, GTBCRn, GTVPRn, GTDRn), but they are only shown once in this section. 10.3.2.1 Timer Frequency Reporting Register (TFRR) The timer frequency reporting register (TFRR), shown in Figure 10-9, is written by software to report the clocking frequency of the PIC timers. Note that although TFRR is read/write, the value of this register is ignored by the PIC unit. Figure 10-9. Timer Frequency Reporting Register (TFRR) 015 16 31 R 0 0 00000000 000000 VECTOR W Reset 0000_0000_0000_0000_1111_1111_1111_1111 Offset 0x4_10E0 Table 10-13. SVR Field Descriptions Bits Name Description 0–15 — Reserved 16–3 1 VECTO R Spurious interrupt vector. Value returned when IACK is read during a spurious vector fetch. 0 31 R FREQ W Reset 0000_0000_0000_0000_0000_0000_0000_0000 Offset 0x4_10F0 |
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