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MPC8540 Datasheet(PDF) 479 Page - Freescale Semiconductor, Inc |
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MPC8540 Datasheet(HTML) 479 Page - Freescale Semiconductor, Inc |
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479 / 1302 page ![]() MPC8540 PowerQUICC III Integrated Host Processor Reference Manual, Rev. 1 Freescale Semiconductor 12-1 Chapter 12 DUART This chapter describes the dual universal asynchronous receiver/transmitters (DUART) of the MPC8540. It describes the functional operation, the DUART initialization sequence, and the programming details for the DUART registers and features. 12.1 Overview The DUART of the MPC8540 consists of two universal asynchronous receiver/transmitters (UARTs). The UARTs act independently; all references to UART refer to one of these receiver/transmitters. Each UART is clocked by the core complex bus (CCB) clock. The DUART programming model is compatible with the PC16552D. The UART interface is point to point, meaning that only two UART devices are attached to the connecting signals. As shown in Figure 12-1, each UART module consists of the following: • Receive and transmit buffers • Clear to send (CTS) input port and request to send (RTS) output port for data flow control • 16-bit counter for baud rate generation • Interrupt control logic |
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