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MPC8540 Datasheet(PDF) 480 Page - Freescale Semiconductor, Inc |
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MPC8540 Datasheet(HTML) 480 Page - Freescale Semiconductor, Inc |
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480 / 1302 page ![]() MPC8540 PowerQUICC III Integrated Host Processor Reference Manual, Rev. 1 12-2 Freescale Semiconductor DUART Figure 12-1. UART Block Diagram 12.1.1 Features The DUART includes these distinctive features: • Full-duplex operation • Programming model compatible with the original PC16450 UART and the PC16550D (an improved version of the PC16450 that also operates in FIFO mode) • PC16450 register reset values • FIFO mode for both transmitter and receiver, providing 16-byte FIFOs • Serial data encapsulation and decapsulation with standard asynchronous communication bits (START, STOP, and parity) • Maskable transmit, receive, line status, and MODEM status interrupts • Software-programmable baud generators that divide the CCB clock by 1 to (216 – 1) and generate a 16x clock for the transmitter and receiver engines • Clear to send (CTS) and ready to send (RTS) MODEM control functions • Software-selectable serial interface data format (data length, parity, 1/1.5/2 STOP bit, baud rate) • Line and MODEM status registers • Line-break detection and generation Receive Buffer Input Port Output Port Address Bus Control Data 16-Bit Counter/ Baud Rate Generator RTS SIN SOUT Interrupt Control Logic Control Transmit Buffer CTS CCB_clk HRESET int |
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