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MPC8540 Datasheet(PDF) 481 Page - Freescale Semiconductor, Inc

Part # MPC8540
Description  MPC8540 PowerQUICC III??Integrated Host Processor Reference Manual
PDF  1302 Pages
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Manufacturer  FREESCALE [Freescale Semiconductor, Inc]
Direct Link  http://www.freescale.com
Logo FREESCALE - Freescale Semiconductor, Inc

MPC8540 Datasheet(HTML) 481 Page - Freescale Semiconductor, Inc

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External Signal Descriptions
MPC8540 PowerQUICC III Integrated Host Processor Reference Manual, Rev. 1
Freescale Semiconductor
12-3
•
Internal diagnostic support, local loopback, and break functions
•
Prioritized interrupt reporting
•
Overrun, parity, and framing error detection
12.1.2 Modes of Operation
The communication channel provides a full-duplex asynchronous receiver and transmitter using
an operating frequency derived from the CCB clock.
The transmitter accepts parallel data from a write to the transmitter holding register (UTHR). In
FIFO mode, the data is placed directly into an internal transmitter shift register of the transmitter
FIFO. The transmitter converts the data to a serial bit stream inserting the appropriate start, stop,
and optional parity bits. Finally, it outputs a composite serial data stream on the channel transmitter
serial data output signal (SOUT). The transmitter status may be polled or interrupt driven.
The receiver accepts serial data bits on the channel receiver serial data input signal (SIN), converts
it to parallel format, checks for a start bit, parity (if any), stop bits, and transfers the assembled
character (with start, stop, parity bits removed) from the receiver buffer (or FIFO) in response to
a read of the UART’s receiver buffer register (URBR). The receiver status may be polled or
interrupt driven.
12.2 External Signal Descriptions
This section contains a signal overview and detailed signal descriptions.
12.2.1 Signal Overview
Table 12-1 summarizes the DUART signals. Note that although the actual device signal names are
prepended with the UART_ prefix as shown in the table, the functional (abbreviated) signal names
are often used throughout this chapter.
12.2.2 Detailed Signal Descriptions
The eight DUART signals are described in detail in Table 12-2.
Table 12-1. DUART Signal Overview
Signal Name
I/O
Pins
Reset
Value
State Meaning
UART_SIN[0:1]
I
2
1
Serial in data UART0 and UART1
UART_SOUT[0:1]
O
2
1
Serial out data UART0 and UART1
UART_CTS[0:1]
I
2
1
Clear to send UART0 and UART1
UART_RTS[0:1]
O
2
1
Request to send UART0 and UART1



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