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MPC8540 Datasheet(PDF) 500 Page - Freescale Semiconductor, Inc

Part # MPC8540
Description  MPC8540 PowerQUICC III??Integrated Host Processor Reference Manual
PDF  1302 Pages
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Manufacturer  FREESCALE [Freescale Semiconductor, Inc]
Direct Link  http://www.freescale.com
Logo FREESCALE - Freescale Semiconductor, Inc

MPC8540 Datasheet(HTML) 500 Page - Freescale Semiconductor, Inc

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MPC8540 PowerQUICC III Integrated Host Processor Reference Manual, Rev. 1
12-22
Freescale Semiconductor
DUART
12.4.1.3
Parity Bit
The user has the option of using even, odd, no parity, or stick parity (see Section 12.3.1.7, “Line
Control Registers (ULCR0, ULCR1).” Both the receiver and transmitter parity definition must
agree before attempting to transfer data. When receiving data a parity error can occur if an
unexpected parity value is detected. (See Section 12.3.1.9, “Line Status Registers (ULSR0,
ULSR1).”)
12.4.1.4
STOP Bit
The transmitter device ends the write transfer by generating a STOP bit. The STOP bit is always
high. The user can program the length of the STOP bit(s) in the ULCR. Both the receiver and
transmitter STOP bit length must agree before attempting to transfer data. A framing error can
occur if an invalid STOP bit is detected.
12.4.2 Baud-Rate Generator Logic
Each UART contains an independent programmable baud-rate generator, that is capable of taking
the CCB clock input and dividing the input by any divisor from 1 to 2
16 –1.
The baud rate is defined as the number of bits per second that can be sent over the UART bus. The
formula for calculating baud rate is as follows:
Baud rate = (1/16)
× (CCB clock frequency/divisor value)
Therefore, the output frequency of the baud-rate generator is 16 times the baud rate.
The divisor value is determined by the following two 8-bit registers to form a 16-bit binary
number:
•
UART divisor most significant byte register (UDMB)
•
UART divisor least significant byte register (UDLB)
Upon loading either of the divisor latches, a 16-bit baud-rate counter is loaded.
The divisor latches must be loaded during initialization to ensure proper operation of the baud-rate
generator. Both UART devices on the same bus must be programmed for the same baud-rate
before starting a transfer.
The baud clock can be passed to the performance monitor by enabling the UAFR[BO] bit. This
can be used to determine baud rate errors.
12.4.3 Local Loop-Back Mode
Local loop-back mode is provided for diagnostic testing. The data written to UTHR can be read
from the receiver buffer register (URBR) of the same UART. In this mode, the MODEM control



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