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MPC8540 Datasheet(PDF) 617 Page - Freescale Semiconductor, Inc |
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MPC8540 Datasheet(HTML) 617 Page - Freescale Semiconductor, Inc |
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617 / 1302 page ![]() Initialization/Application Information MPC8540 PowerQUICC III Integrated Host Processor Reference Manual, Rev. 1 Freescale Semiconductor 13-113 This section describes synchronous single write and read, and synchronous burst write and read operations. The local bus supports the DSI single strobe as well as the DSI double strobes of operation. The dual strobe configuration is shown as an example. g2tx 14–15 g3tx 16–17 g4t1 18 g4t3 10 19 g5tx 20–21 redo[0] 0 0 1 22 redo[1] 0 0 0 23 loop 0 0 24 exen 0 25 amx0 0 0 26 amx1 0 0 27 na 0 28 uta 0 29 todt 0 30 last 0 31 Table 13-47. UPM Synchronization Cycles (continued) Sync CYCLE Compensation CYCLE DSI CYCLE 1 Bits |
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