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MPC8540 Datasheet(PDF) 644 Page - Freescale Semiconductor, Inc |
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MPC8540 Datasheet(HTML) 644 Page - Freescale Semiconductor, Inc |
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644 / 1302 page  MPC8540 PowerQUICC III Integrated Host Processor Reference Manual, Rev. 1 14-18 Freescale Semiconductor Three-Speed Ethernet Controllers 0x2_46D8 RJBR—Receive jabber counter register R/W 0x0000_0000 14.5.3.7.23/14-72 0x2_46DC RDRP—Receive drop register R/W 0x0000_0000 14.5.3.7.24/14-72 TSEC1 Transmit Counters 0x2_46E0 TBYT—Transmit byte counter register R/W 0x0000_0000 14.5.3.7.25/14-73 0x2_46E4 TPKT—Transmit packet counter register R/W 0x0000_0000 14.5.3.7.26/14-73 0x2_46E8 TMCA—Transmit multicast packet counter register R/W 0x0000_0000 14.5.3.7.27/14-74 0x2_46EC TBCA—Transmit broadcast packet counter register R/W 0x0000_0000 14.5.3.7.28/14-74 0x2_46F0 TXPF—Transmit PAUSE control frame counter register R/W 0x0000_0000 14.5.3.7.29/14-75 0x2_46F4 TDFR—Transmit deferral packet counter register R/W 0x0000_0000 14.5.3.7.30/14-75 0x2_46F8 TEDF—Transmit excessive deferral packet counter register R/W 0x0000_0000 14.5.3.7.31/14-76 0x2_46FC TSCL—Transmit single collision packet counter register R/W 0x0000_0000 14.5.3.7.32/14-76 0x2_4700 TMCL—Transmit multiple collision packet counter register R/W 0x0000_0000 14.5.3.7.33/14-77 0x2_4704 TLCL—Transmit late collision packet counter register R/W 0x0000_0000 14.5.3.7.34/14-77 0x2_4708 TXCL—Transmit excessive collision packet counter register R/W 0x0000_0000 14.5.3.7.35/14-78 0x2_470C TNCL—Transmit total collision counter register R/W 0x0000_0000 14.5.3.7.36/14-78 0x2_4710 Reserved R 0x0000_0000 — 0x2_4714 TDRP—Transmit drop frame counter register R/W 0x0000_0000 14.5.3.7.37/14-79 0x2_4718 TJBR—Transmit jabber frame counter register R/W 0x0000_0000 14.5.3.7.38/14-79 0x2_471C TFCS—Transmit FCS error counter register R/W 0x0000_0000 14.5.3.7.39/14-80 0x2_4720 TXCF—Transmit control frame counter register R/W 0x0000_0000 14.5.3.7.40/14-80 0x2_4724 TOVR—Transmit oversize frame counter register R/W 0x0000_0000 14.5.3.7.41/14-81 0x2_4728 TUND—Transmit undersize frame counter register R/W 0x0000_0000 14.5.3.7.42/14-81 0x2_472C TFRG—Transmit fragments frame counter register R/W 0x0000_0000 14.5.3.7.43/14-82 TSEC1 General Registers 0x2_4730 CAR1—Carry register one R/W 0x0000_0000 14.5.3.7.44/14-82 0x2_4734 CAR2—Carry register two R/W 0x0000_0000 14.5.3.7.45/14-84 0x2_4738 CAM1—Carry register one mask register R/W 0xFE01_FFFF 14.5.3.7.46/14-85 0x2_473C CAM2—Carry register two mask register R/W 0x000F_FFFF 14.5.3.7.47/14-86 0x2_4740– 0x2_47FC Reserved R 0x0000_0000 — Table 14-3. Module Memory Map (continued) Offset Name Access1 Reset Section/Page |
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