MPC8540 datasheet(696/1302 Pages) FREESCALE

696 / 1302 page

MPC8540 PowerQUICC III Integrated Host Processor Reference Manual, Rev. 1

14-70

Freescale Semiconductor

Three-Speed Ethernet Controllers

Table 14-64 describes the fields of the RCDE register.

14.5.3.7.19Receive Carrier Sense Error Counter Register (RCSE)

Figure 14-67 shows the RCSE register.

Table 14-65 describes the fields of the RCSE register.

14.5.3.7.20Receive Undersize Packet Counter Register (RUND)

Figure 14-68 shows the RUND register.

Table 14-64. RCDE Field Descriptions

Bits

Name

Description

0–15

—

Reserved

16–31 RCDE Receive code error counter. Increments each time a valid carrier is present and at least one invalid data

symbol is detected.

015 16

R 0 0 0 0 00000 0 0 0 0 0 0

RCSE

Reset

0000_0000_0000_0000_0000_0000_0000_0000

Offset

TSEC1:0x2_46C8; TSEC2:0x2_56C8

Figure 14-67. Receive Carrier Sense Error Counter Register Definition

Table 14-65. RCSE Field Descriptions

Bits

Name

Description

0–15

—

Reserved

16–31 RCSE Receive false carrier counter. Increments each time a false carrier is detected during idle, as defined by

a 1 on TSECn_RX_ER and an 0xE on TSECn_RXD. The event is reported along with the statistics

generated on the next received frame. Only one false carrier condition can be detected and logged

between frames.

015 16

R 0 0 0 00 00 0 0 0 0

0 0

RUND

Reset

0000_0000_0000_0000_0000_0000_0000_0000

Offset

TSEC1:0x2_46CC; TSEC2:0x2_56CC

Figure 14-68. Receive Undersize Packet Counter Register Definition

MPC8540 Datasheet(PDF) 696 Page - Freescale Semiconductor, Inc

MPC8540 Datasheet(HTML) 696 Page - Freescale Semiconductor, Inc

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

Datasheet Download

Link URL