MPC8540 datasheet(707/1302 Pages) FREESCALE

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Memory Map/Register Definition

MPC8540 PowerQUICC III Integrated Host Processor Reference Manual, Rev. 1

Freescale Semiconductor

14-81

Table 14-86 describes the fields of the TXCF register.

14.5.3.7.41Transmit Oversize Frame Counter Register (TOVR)

Figure 14-89 shows the TOVR register.

Table 14-87 describes the fields of the TOVR register.

14.5.3.7.42Transmit Undersize Frame Counter Register (TUND)

Figure 14-90 shows the TUND register.

Table 14-86. TXCF Field Descriptions

Bits

Name

Description

0–19

—

Reserved

20–31 TXCF Transmit control frame counter. Increments for every valid size frame with a type field signifying a control

frame.

19 20

R 0 0 0 0000000 0

0 0

0000

TOVR

Reset

0000_0000_0000_0000_0000_0000_0000_0000

Offset

TSEC1:0x2_4724; TSEC2:0x2_5724

Figure 14-89. Transmit Oversized Frame Counter Register Definition

Table 14-87. TOVR Field Descriptions

Bits

Name

Description

0–19

—

Reserved

20–31 TOVR Transmit oversize frame counter. Increments for each oversized transmitted frame with a correct FCS

value.

R 0

00 0 0 0 0 0 0 0 0

TDFR

Reset

0000_0000_0000_0000_0000_0000_0000_0000

Offset

TSEC1:0x2_4728; TSEC2:0x2_5728

Figure 14-90. Transmit Undersize Frame Counter Register Definition

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