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MPC8540 Datasheet(PDF) 708 Page - Freescale Semiconductor, Inc |
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MPC8540 Datasheet(HTML) 708 Page - Freescale Semiconductor, Inc |
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708 / 1302 page ![]() MPC8540 PowerQUICC III Integrated Host Processor Reference Manual, Rev. 1 14-82 Freescale Semiconductor Three-Speed Ethernet Controllers Table 14-88 describes the fields of the TUND register. 14.5.3.7.43Transmit Fragment Counter Register (TFRG) Figure 14-91 shows the TFRG register. Table 14-89 describes the fields of the TFRG register. 14.5.3.7.44Carry Register 1 (CAR1) Carry register bits are cleared when written with a one. Figure 14-92 shows the CAR1 register. Table 14-88. TUND Field Descriptions Bits Name Description 0–19 — Reserved 20–31 TDFR Transmit undersize frame counter. Increments for every frame less then 64 bytes, with a correct FCS value. 0 19 20 31 R 0 0 0 0 000 000 0 0 0 0 0 0 0 0 0 0 TFRG W Reset 0000_0000_0000_0000_0000_0000_0000_0000 Offset TSEC1:0x2_472C; TSEC2:0x2_572C Figure 14-91. Transmit Fragment Counter Register Definition Table 14-89. TFRG Field Descriptions Bits Name Description 0–19 — Reserved 20–31 TFRG Transmit fragment counter. Increments for every frame less then 64 bytes, with an incorrect FCS value. 0 1 234 5 6 7 14 15 R C1 64 C1 127 C1 255 C1 511 C1 1K C1 MAX C1 MGV 00 0 0 0 0 0 0 C1 RBY W Reset 0000_0000_0000_0000 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 R C1 RPK C1 RFC C1 RMC C1 RBC C1 RXC C1 RXP C1 RXU C1 RAL C1 RFL C1 RCD C1 RCS C1 RUN C1 ROV C1 RFR C1 RJB C1 RDR W Reset 0000_0000_0000_0000 Offset TSEC1:0x2_4730; TSEC2:0x2_5730 Figure 14-92. Carry Register 1 (CAR1) Register Definition |
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