MPC8540 datasheet(713/1302 Pages) FREESCALE

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Memory Map/Register Definition

MPC8540 PowerQUICC III Integrated Host Processor Reference Manual, Rev. 1

Freescale Semiconductor

14-87

Table 14-93 describes the fields of the CAM2 register.

14.5.3.8 Hash Function Registers

This section provides detailed descriptions of the registers used for hash functions. All of the

registers are 32 bits wide. If the DA field of a receive frame is processed through a 32-bit CRC

generator, the 8 bits of the CRC remainder is mapped to a hash table entry. The user can enable a

hash entry by setting the appropriate bit. A hash entry usually represents a set of addresses. A hash

table hit occurs if the DA CRC result points to an enabled hash entry. The user must further filter

the address. See Section 14.6.2.6.2, “Hash Table Algorithm,” for more information on the hash

algorithm.

Table 14-93. CAM2 Field Descriptions

Bits

Name

Description

0–11

—

Reserved

M2TJB

Mask register 2 TJBR counter carry bit mask

M2TFC

Mask register 2 TFCS counter carry bit mask

M2TCF

Mask register 2 TXCF counter carry bit mask

M2TOV

Mask register 2 TOVR counter carry bit mask

M2TUN

Mask register 2 TUND counter carry bit mask

M2TFG

Mask register 2 TFRG counter carry bit mask

M2TBY

Mask register 2 TBYT counter carry bit mask

M2TPK

Mask register 2 TPKT counter carry bit mask

M2TMC

Mask register 2 TMCA counter carry bit mask

M2TBC

Mask register 2 TBCA counter carry bit mask

M2TPF

Mask register 2 TXPF counter carry bit mask

M2TDF

Mask register 2 TDFR counter carry bit mask

M2TED

Mask register 2 TEDF counter carry bit mask

M2TSC

Mask register 2 TSCL counter carry bit mask

M2TMA

Mask register 2 TMCL counter carry bit mask

M2TLC

Mask register 2 TLCL counter carry bit mask

M2TXC

Mask register 2 TXCL counter carry bit mask

M2TNC

Mask register 2 TNCL counter carry bit mask

—

Reserved

M2TDP

Mask register 2 TDRP counter carry bit mask

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