MPC8540 datasheet(731/1302 Pages) FREESCALE

731 / 1302 page

Functional Description

MPC8540 PowerQUICC III Integrated Host Processor Reference Manual, Rev. 1

Freescale Semiconductor

14-105

Figure 14-111. TSEC-GMII Connection

A GMII interface has 28 signals (TSECn_GTX_CLK + EC_GTX_CLK125 included), as defined

by the IEEE 802.3u standard, for connecting to an Ethernet PHY.

14.6.1.3 Reduced Gigabit Media-Independent Interface (RGMII)

This section describes the reduced gigabit media-independent interface (RGMII) intended to be

used between the PHYs and the GMII MAC. The RGMII is an alternative to the IEEE802.3u MII,

the IEEE802.3z GMII, and the TBI. The RGMII reduces the number of signals required to

interconnect the MAC and the PHY from a maximum of 28 signals (GMII) to 15 signals

(EC_GTX_CLK125 included) in a cost-effective and technology-independent manner. To

accomplish this objective, the data paths and all associated control signals are multiplexed using

both edges of the clock. For gigabit operation, the clocks operate at 125 MHz, and for 10/100

operation, the clocks operate at 2.5 MHz or 25 MHz, respectively. Figure 14-112 shows the basic

components of the gigabit reduced media-independent interface and the signals required to

establish the gigabit Ethernet controllers’ module connection with a PHY. The RGMII is

implemented as defined by the RGMII specification Version 1.2a 9/22/00.

Transmit Error (TSECn_TX_ER)

Transmit Nibble Data (TSECn_TXD[7:0])

Transmit Enable (TSECn_TX_EN)

Transmit Clock (TSECn_TX_CLK)

Collision Detect (TSECn_COL)

Receive Nibble Data (TSECn_RXD[7:0])

Receive Error (TSECn_RX_ER)

Receive Clock (TSECn_RX_CLK)

Receive Data Valid (TSECn_RX_DV)

Carrier Sense Output (TSECn_CRS)

Management Data I/O1 (EC_MDIO)

Management Data Clock1 (EC_MDC)

TSEC

Gigabit

PHY

Medium

1 The management signals (EC_MDC and EC_MDIO) are common to all of the Ethernet controllers’

connections in the system, assuming that each PHY has a different management address.

Gigabit Reference Clock (EC_GTX_CLK125)

Gigabit Transmit Clock (TSECn_GTX_CLK)

Ethernet

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