MPC8540 datasheet(727/1302 Pages) FREESCALE

Part #	MPC8540

Description	MPC8540 PowerQUICC III??Integrated Host Processor Reference Manual

PDF	1302 Pages

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Manufacturer	FREESCALE [Freescale Semiconductor, Inc]

Direct Link	http://www.freescale.com

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727 / 1302 page

Memory Map/Register Definition

MPC8540 PowerQUICC III Integrated Host Processor Reference Manual, Rev. 1

Freescale Semiconductor

14-101

14.5.4.10 Jitter Diagnostics Register (JD)

Annex 36A in IEEE 802.3z describes several jitter test patterns. These can be configured to be sent

by writing the jitter diagnostics register. See the register description for more information. It may

be wise to auto-negotiate and advertise a remote fault, signaling offline, prior to beginning the test

patterns. Figure 14-108 shows the JD register.

1000T Half 1000T half-duplex capability. Returns 0 on read. This bit is read-only.

0 PHY cannot operate in 1000BASE-T half-duplex mode

1 PHY can operate in 1000BASE-T half-duplex mode

4–15

—

Reserve

Jitter

Enable

Jitter

Select

Custom Jitter Pattern

Reset

0000_0000_0000_0000

Offset

TBIPA offset + 0x10

Figure 14-108. Jitter Diagnostics Register Definition

Table 14-107. EXST Field Descriptions (continued)

Bits

Name

Description

MPC8540 Datasheet(PDF) 727 Page - Freescale Semiconductor, Inc