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MPC8540 Datasheet(PDF) 752 Page - Freescale Semiconductor, Inc |
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MPC8540 Datasheet(HTML) 752 Page - Freescale Semiconductor, Inc |
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752 / 1302 page  MPC8540 PowerQUICC III Integrated Host Processor Reference Manual, Rev. 1 14-126 Freescale Semiconductor Three-Speed Ethernet Controllers Figure 14-116. Example of TSEC Memory Structure for BD Figure 14-117. Buffer Descriptor Ring 14.6.3.1 Transmit Data Buffer Descriptor (TxBD) Data is presented to the TSEC for transmission by arranging it in memory buffers referenced by the TxBDs. In the TxBD the user initializes the R, PAD/CRC, W, L, and TC bits and the length (in bytes) in the first word, and the buffer pointer in the second word. Status & Control Data Length Buffer Pointer Status & Control Data Length Buffer Pointer Rx Buffer Descriptors Tx Buffer Descriptors RxBD Table TxBD Table TxBD Table Pointer RxBD Table Pointer (TBASE) (RBASE) Memory Map System Memory Tx Buffer Rx Buffer Beginning BD pointer 1 3 0 2 4 W = 1 |
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