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MPC8540 Datasheet(PDF) 757 Page - Freescale Semiconductor, Inc |
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MPC8540 Datasheet(HTML) 757 Page - Freescale Semiconductor, Inc |
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757 / 1302 page ![]() Initialization/Application Information MPC8540 PowerQUICC III Integrated Host Processor Reference Manual, Rev. 1 Freescale Semiconductor 14-131 14.7 Initialization/Application Information 14.7.1 Interface Mode Configuration This section describes how to configure the TSEC in different supported interface modes. These include MII, GMII, TBI, RGMII, RTBI. The pinout, the data registers that must be initialized, as well as speed selection options are described. The ECNTRL[TBIM] and ECNTRL[RPM] bits are written, assuming the part was not pin-configured at initialization to the correct mode. 14.7.1.1 MII Interface Mode Table 14-122 describes the signal configurations required for MII interface mode. Table 14-122. MII Interface Mode Signal Configuration TSEC Signals Frequency [MHz] 125 Voltage[V] 3.3/2.5 MII Interface Frequency [MHz] 25 Voltage[V] 3.3 Signals I/O No. of Signals Signals I/O No. of Signals GTX_CLK O 1 Leave Unconnected O TX_CLK I 1 TX_CLK I 1 TxD[0] O 1 TxD[0] O 1 TxD[1] O 1 TxD[1] O 1 TxD[2] O 1 TxD[2] O 1 TxD[3] O 1 TxD[3] O 1 TxD[4] O 1 Leave Unconnected O TxD[5] O 1 Leave Unconnected O TxD[6] O 1 Leave Unconnected O TxD[7] O 1 Leave Unconnected O TX_EN O 1 TX_EN O 1 TX_ER O 1 TX_ER O 1 RX_CLK I 1 RX_CLK I 1 RxD[0] I 1 RxD[0] I 1 RxD[1] I 1 RxD[1] I 1 RxD[2] I 1 RxD[2] I 1 RxD[3] I 1 RxD[3] I 1 RxD[4] I 1 not used I RxD[5] I 1 not used I |
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