MPC8540 datasheet(786/1302 Pages) FREESCALE

786 / 1302 page

MPC8540 PowerQUICC III Integrated Host Processor Reference Manual, Rev. 1

15-8

Freescale Semiconductor

DMA Controller

0x2_1134

CLSDAR0—DMA current list alternate base descriptor

address register 0

R/W

0x0000_0000

15.3.2.10/15-24

0x2_1138

Reserved

—

0x2_113C

NLSDAR0—DMA next list descriptor address register 0

R/W

0x0000_0000

15.3.2.11/15-25

0x2_1140

SSR0—DMA source stride register 0

R/W

0x0000_0000

15.3.2.12/15-25

0x2_1144

DSR0—DMA destination stride register 0

R/W

0x0000_0000

15.3.2.13/15-26

0x2_1148

–

0x2_117C

Reserved

—

0x2_1180

MR1—DMA mode register 1

R/W

0x0000_0000

15.3.2.1/15-10

0x2_1184

SR1—DMA status register 1

Special

0x0000_0000

15.3.2.2/15-13

0x2_1188

Reserved

—

0x2_118C

CLNDAR1—DMA current link descriptor address

R/W

0x0000_0000

15.3.2.3/15-14

0x2_1190

SATR1—DMA source attributes register 1

R/W

0x0000_0000

15.3.2.4/15-16

0x2_1194

SAR1—DMA source address register 1

R/W

0x0000_0000

15.3.2.5/15-18

0x2_1198

DATR1—DMA destination attributes register 1

R/W

0x0000_0000

15.3.2.6/15-19

0x2_119C

DAR1—DMA destination address register 1

R/W

0x0000_0000

15.3.2.7/15-21

0x2_11A0

BCR1—DMA byte count register 1

R/W

0x0000_0000

15.3.2.8/15-23

0x2_11A4

Reserved

—

0x2_11A8

NLNDAR1—DMA next link descriptor address register 1

R/W

0x0000_0000

15.3.2.9/15-23

0x2_11AC

–

0x2_11B0

Reserved

—

0x2_11B4

CLSDAR1—DMA current list alternate base descriptor

address register 1

R/W

0x0000_0000

15.3.2.10/15-24

0x2_11B8

Reserved

—

0x2_11BC

NLSDAR1—DMA next list descriptor address register 1

R/W

0x0000_0000

15.3.2.11/15-25

0x2_11C0

SSR1—DMA source stride register 1

R/W

0x0000_0000

15.3.2.12/15-25

0x2_11C4

DSR1—DMA destination stride register 1

R/W

0x0000_0000

15.3.2.13/15-26

0x2_11C8

–

0x2_11FC

Reserved

—

0x2_1200

MR2—DMA mode register 2

R/W

0x0000_0000

15.3.2.1/15-10

0x2_1204

SR2—DMA status register 2

Special

0x0000_0000

15.3.2.2/15-13

0x2_1208

Reserved

—

0x2_120C

CLNDAR2—DMA current link descriptor address

R/W

0x0000_0000

15.3.2.3/15-14

0x2_1210

SATR2—DMA source attributes register 2

R/W

0x0000_0000

15.3.2.4/15-16

0x2_1214

SAR2—DMA source address register 2

R/W

0x0000_0000

15.3.2.5/15-18

Table 15-4. DMA Register Summary (continued)

Offset

Access

Reset

Section/Page

MPC8540 Datasheet(PDF) 786 Page - Freescale Semiconductor, Inc

MPC8540 Datasheet(HTML) 786 Page - Freescale Semiconductor, Inc

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

Datasheet Download

Link URL