MPC8540 datasheet(837/1302 Pages) FREESCALE

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Memory Map/Register Definitions

MPC8540 PowerQUICC III Integrated Host Processor Reference Manual, Rev. 1

Freescale Semiconductor

16-15

16.3 Memory Map/Register Definitions

The PCI/X interface unit of the MPC8540 supports the following register types:

•

Memory-mapped registers—these registers control PCI address translation, PCI error

management, and PCI configuration register access on the MPC8540. These registers are

described in Section 16.3.1, “PCI/X Memory Mapped Registers,” and its subsections.

•

PCI/X configuration registers contained within the PCI/X configuration header—these

registers are specified by the PCI bus specification for every PCI device. These registers

are described in Section 16.3.2, “PCI/X Configuration Header,” and its subsections.

16.3.1 PCI/X Memory Mapped Registers

The PCI/X memory mapped registers are accessed by reading and writing to an address comprised

of the base address (specified in the CCSRBAR on the local side or the PCSRBAR on the PCI/X

side) plus the offset of the specific register to be accessed. Note that all memory-mapped registers

(except the PCI/X configuration data register, PCI CFG_DATA) must only be accessed as 32-bit

quantities.

Table 16-3 lists the memory-mapped registers.

Table 16-3. PCI/X Memory-Mapped Register Map

Offset

Access

Reset

Section/Page

PCI/X Configuration Access Registers

0x0_8000

CFG_ADDR—PCI/X configuration address

R/W

0x0000_0000

16.3.1.1.1/16-18

0x0_8004

CFG_DATA—PCI/X configuration data

R/W

0x0000_0000

16.3.1.1.1/16-18

0x0_8008

INT_ACK—PCI/X interrupt acknowledge

0x0000_0000

16.3.1.1.3/16-20

0x0_800C–

0x0_8BFC

Reserved

—

PCI/X ATMU Registers—Outbound and Inbound

0x0_8C00–0x0_8C3C–Outbound Window 0 (default)

0x0_8C00

POTAR0—PCI/X outbound window 0 (default) translation

address register

R/W

0x0000_0000

16.3.1.2.1/16-21

0x0_8C04

POTEAR0—PCI/X outbound window 0 (default) translation

extended address register

R/W

0x0000_0000

16.3.1.2.2/16-21

0x0_8C08

Reserved

—

0x0_8C0C

Reserved

—

0x0_8C10

POWAR0—PCI/X outbound window 0 (default) attributes

R/W

0x8004_401F

16.3.1.2.4/16-22

0x0_8C14–

0x0_8C1C

Reserved

—

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