MPC8540 datasheet(856/1302 Pages) FREESCALE

856 / 1302 page

MPC8540 PowerQUICC III Integrated Host Processor Reference Manual, Rev. 1

16-34

Freescale Semiconductor

PCI/PCI-X Bus Interface

16.3.1.4.6 PCI/X Error Extended Address Capture Register

(ERR_EXT_ADDR)

Figure 16-20. PCI/X Error Extended Address Capture Register (ERR_EXT_ADDR)

16.3.1.4.7 PCI/X Error Data Low Capture Register (ERR_DL)

Note that for inbound reads that have data parity errors, only the address (ERR_ADDR and

ERR_EXT_ADDR) and attributes (ERR_ATTRIB) are captured. The data is not captured. Also

note that PCI-X split completion error messages for outbound DWORD writes are incorrectly

reported in the PCI/X error data low capture register (ERR_DL).

Figure 16-21. PCI/X Error Data Low Capture Register (ERR_DL)

16.3.1.4.8 PCI/X Error Data High Capture Register (ERR_DH)

Note that for inbound reads that have data parity errors, only the address (ERR_ADDR and

ERR_EXT_ADDR) and attributes (ERR_ATTRIB) are captured. The data is not captured.

Memory Extended Address

Reset

0000_0000_0000_0000_0000_0000_0000_0000

Offset

0x0_8E14

Table 16-20. ERR_EXT_ADDR Field Descriptions

Bits

Name

Description

0–31

Memory extended address

Memory transaction extended address

Data low

Reset

0000_0000_0000_0000_0000_0000_0000_0000

Offset

0x0_8E18

Table 16-21. ERR_DL Field Description

Bits

Name

Description

0–31

Data low

Least significant PCI bus data word

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