MPC8540 datasheet(858/1302 Pages) FREESCALE

Part #	MPC8540

Description	MPC8540 PowerQUICC III??Integrated Host Processor Reference Manual

PDF	1302 Pages

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Manufacturer	FREESCALE [Freescale Semiconductor, Inc]

Direct Link	http://www.freescale.com

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858 / 1302 page

MPC8540 PowerQUICC III Integrated Host Processor Reference Manual, Rev. 1

16-36

Freescale Semiconductor

PCI/PCI-X Bus Interface

16.3.1.4.10PCI-X Split Completion Timer Register (PCIX_TIMR)

Figure 16-24. PCI-X Split Completion Timer Register (PCIX_TIMR)

16.3.2 PCI/X Configuration Header

The PCI Local Bus Specification defines the configuration registers contained within the PCI/X

configuration header from 0x00 through 0x3F. The PCI-X Addendum to the PCI Local Bus

Specification defines additional registers beyond 0x3F. Figure 16-25 lists the common PCI/X

configuration header as implemented by the MPC8540.

R 0

000

TCNT

Reset

0000_0001_0000_0000_0011_1111_1111_1111

Offset

0x0_8E24

Table 16-24. PCIX_TIMR Field Descriptions

Bits

Nam

Description

0–6

—

Reserved

PCI-X timer enable

0 PCI-X timer is disabled.

1 PCI-X timer is enabled (default).

8–3

TCN

Number of system clocks to purge a split completion buffer. This occurs when a split completion does

not follow a split response.

MPC8540 Datasheet(PDF) 858 Page - Freescale Semiconductor, Inc