MPC8540 datasheet(907/1302 Pages) FREESCALE

Part #	MPC8540

Description	MPC8540 PowerQUICC III??Integrated Host Processor Reference Manual

PDF	1302 Pages

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Manufacturer	FREESCALE [Freescale Semiconductor, Inc]

Direct Link	http://www.freescale.com

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Functional Description

MPC8540 PowerQUICC III Integrated Host Processor Reference Manual, Rev. 1

Freescale Semiconductor

16-85

Figure 16-69. Typical PCI-X Write Transaction

Figure 16-70 shows a the following burst write transactions: memory write, memory write block,

and split completion transactions. Signals preceded by “s1_” indicate a signal that is internal to the

device after the signal has been sampled. For the memory write block and split completion

transactions the PCI_C/BE[7:0] signals are driven high by the initiator on every data phase. Note

that there are no target initial wait states for this example.

Data Transfer

PCI_CLK

PCI_AD

PCI_IRDY

PCI_TRDY

34567

PCI_DEVSEL

ADDR

Bus Transaction

ATTR

DATA0 DATA1 DATA2 DATA3 DATA4 DATA5

PCI_C/BE

CMD

ATTR

BE0

BE1

BE2

BE3

BE4

BE5

PCI_FRAME

Initiator Termination

Around

Turn

Data

Phase

Data

Phase

Data

Phase

Data

Phase

Data

Phase

Data

Phase

Target Response Phase

Attribute Phase

Address Phase

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