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MPC8540 Datasheet(PDF) 912 Page - Freescale Semiconductor, Inc |
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MPC8540 Datasheet(HTML) 912 Page - Freescale Semiconductor, Inc |
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912 / 1302 page ![]() MPC8540 PowerQUICC III Integrated Host Processor Reference Manual, Rev. 1 16-90 Freescale Semiconductor PCI/PCI-X Bus Interface Figure 16-74. Split Response to a Read Transaction Figure 16-74 shows a split response to a write transaction. Figure 16-75. Split Response to a DWORD (4-Byte) Write Transaction 16.4.3.6.2 Completion Address Figure 16-76 shows how AD[31:0] are driven during the address phase for split completion transactions. FFFFFFFFh BE = Fh PCI_CLK PCI_FRAME PCI_AD PCI_C/BE PCI_IRDY PCI_TRDY 123 45 67 89 10 PCI_STOP ADDR ATTR CMD ATTR PCI_DEVSEL BE = Fh PCI_CLK PCI_FRAME PCI_AD[31:0] PCI_C/BE[3:0] PCI_IRDY PCI_TRDY 12 3 4 5 6 78 9 10 PCI_STOP ADDR ATTR CMD ATTR PCI_DEVSEL DATA0 |
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