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MPC8540 Datasheet(PDF) 928 Page - Freescale Semiconductor, Inc

Part # MPC8540
Description  MPC8540 PowerQUICC III??Integrated Host Processor Reference Manual
PDF  1302 Pages
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Manufacturer  FREESCALE [Freescale Semiconductor, Inc]
Direct Link  http://www.freescale.com
Logo FREESCALE - Freescale Semiconductor, Inc

MPC8540 Datasheet(HTML) 928 Page - Freescale Semiconductor, Inc

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MPC8540 PowerQUICC III Integrated Host Processor Reference Manual, Rev. 1
17-4
Freescale Semiconductor
RapidIO Interface
17.1.2 RapidIO Terminology
Table 17-1 describes terminology used throughout this chapter.
17.1.3 RapidIO Interface Features
This section describes the RapidIO interface features.
17.1.3.1 Supported Features
RapidIO supports the following features of the Parallel RapidIO Interconnect Specification:
•
8-bit interface as defined by the 8/16 LP-EP physical layer specification
•
Support for non-coherent I/O transactions
Table 17-1. RapidIO Terminology
Term
Description
Ack
Acknowledge control symbol
CAR
Capability register
CRC
Cyclic redundancy check
CSR
Command and status register
Domain
Logically associated group of processing elements
Doorbell
Port on a device that generates an interrupt to the processor
Double word
An 8-byte quantity
Header
Part of a packet that contains all of the information about the packet excluding any data
ID
Identifier, the name of a processing element on the RapidIO interconnect
Logical layer
Handles all logic transformations of packets between the protocol layer and the physical layer
LP-LVDS
Low-power, low-voltage differential signaling
Mailbox
Dedicated hardware that receives a message in the message passing unit
Physical layer
Physical handling of the transport of packets over the RapidIO interface
Priority
Relative importance of a transaction or packet; in most systems a higher priority transaction or
packet is serviced or transmitted before a lower priority transaction.
Protocol layer
Handling of packets at the protocol level on the RapidIO interface
Receiver
Destination of a packet on the RapidIO interface, also referred to as a destination or a target
Source
Originator of a packet on the RapidIO interconnect
Symbol
One beat of a packet appearing on the interface pins
Target
Destination of a packet on the RapidIO interface, also referred to as a destination or a receiver
Word
A 4-byte quantity



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