MPC8540 datasheet(974/1302 Pages) FREESCALE

974 / 1302 page

MPC8540 PowerQUICC III Integrated Host Processor Reference Manual, Rev. 1

17-50

Freescale Semiconductor

RapidIO Interface

Table 17-43 describes the fields of the PNFEIER.

Table 17-43. PNFEIER Field Descriptions

Bits

Name

Description

0—

Reserved

IAXIE

Inbound ATMU window crossing error interrupt enable

0 Interrupt enabled

1 Interrupt disabled

OAXIE

Outbound ATMU window crossing error interrupt enable

0 Interrupt enabled

1 Interrupt disabled

3–5

—

Reserved

ITIE

Illegal transaction target error interrupt enable

0 Interrupt enabled

1 Interrupt disabled

MSIE

Message size error interrupt enable

0 Interrupt enabled

1 Interrupt disabled

NTIIE

Missing idle after training interrupt enable

0 Interrupt enabled

1 Interrupt disabled

SIE

Message segment error interrupt enable

0 Interrupt enabled

1 Interrupt disabled

DSIE

Duplicate message segment error interrupt enable

0 Interrupt enabled

1 Interrupt disabled

BMIE

Message length error interrupt enable

0 Interrupt enabled

1 Interrupt disabled

ETIE

Error recovery threshold error interrupt enable

0 Interrupt enabled

1 Interrupt disabled

RTIE

Retry threshold error interrupt enable

0 Interrupt enabled

1 Interrupt disabled

RERIE

Received ERROR response error interrupt enable

0 Interrupt enabled

1 Interrupt disabled

LTIE

Link response time-out error interrupt enable

0 Interrupt enabled

1 Interrupt disabled

RSTIE

Packet response time-out error interrupt enable

0 Interrupt enabled

1 Interrupt disabled

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